Chiyoung Lee

Nonvolatile nanocrystal charge trap flash memory devices using a micellar route to ordered arrays of cobalt nanocrystals

This study demonstrates that self-assembled diblock copolymer micelles can be used as a template to assemble cobalt (Co) nanocrystal (NC) arrays for use as charge storage layers in charge trap flash memory devices. Diblock copolymer micelles embedded with Co were synthesized on p-Si substrates having a thin tunneling oxide of HfO2. The micelle templates were completely removed by oxygen plasma treatment and reduction procedures, resulting in ordered arrays of Co NCs. The nonvolatile memory devices exhibit program/erase characteristics, as confirmed by their capacitance-voltage responses, current-voltage responses, endurance characterization, and nanoscale device measurement using scanning nonlinear dielectric microscopy.

PEDOT gate electrodes with PVP/Al2O3 dielectrics for stable high-performance organic TFTs

A poly(3,4-ethylenedioxythiophene) (PEDOT) gate electrode on a polyestersulfone (PES) substrate was used to fabricate inverted staggered pentacene organic thin film transistors (OTFTs). The PEDOT gate formed on the PES substrate exhibited semi-transparency, high conductivity, and excellent adhesion to the substrate. Prior to the deposition of poly-4-vinyl phenol (PVP) dielectrics, a thin Al2O3 layer (12 nm) was coated onto a PEDOT electrode, providing an effective barrier against inter-diffusion between the PVP dielectrics and the underlying PEDOT gate electrode, and against moisture penetration through the PES substrate. This led to stable high-performance OTFTs consisting of a PEDOT gate electrode and PVP/Al2O3 dielectrics. The combined PVP/Al2O3 dielectrics with PEDOT gate electrodes were successfully implemented in flexible organic TFTs that exhibit excellent compatibility with flexible electronics.

Formation of Cu nanocrystals on 3-mercaptopropyltrimethoxysilane monolayer by pulsed iodine-assisted chemical vapor deposition for nonvolatile memory applications

We fabricated nonvolatile nanocrystal flash memory using Cu nanocrystals deposited at 110 °C by pulsed iodine-assisted chemical vapor deposition (CVD) as the charge storage elements. The Cu nanocrystals are deposited on 3-mercaptopropyltrimethoxysilane (MPTMS) coated SiO2 (4 nm) thermally grown on Si, followed by the coating of MPTMS on the Cu nanoparticles to immobilize the Cu atoms. This novel device structure is simply fabricated by pulsed CVD and exhibits a threshold voltage shift of 1.9 V after the application of a voltage pulse (erase: −14 V, 1 ms/program: 40 V, 1 ms) to the gate and has reliable data retention characteristics.

Effect of O2 Gas during Inductively Coupled O2/Cl2 Plasma Etching of Mo and HfO2 for Gate Stack Patterning

In this study, we investigated the etching characteristics of Mo and HfO2 single layers and Mo/HfO2 stacked structure for metal electrode/high-k gate stack patterning in O2/Cl2 inductively coupled plasmas and the effects of O2 addition on the etch rates and etch selectivity of the Mo to the HfO2 layer. By controlling the process parameters such as the O2/Cl2 flow ratio, the top electrode power and the dc self-bias voltage (Vdc), the Mo/HfO2 etch selectivity as high as \cong67 could be obtained. Addition of O2 gas to the O2/Cl2 chemistry improved the Mo/HfO2 etch selectivity because the O2 gas in a certain flow ratio range reduced the HfO2 etching reactions due to less chlorination of Hf but enhanced the Mo etch rate presumably due to effective formation of highly volatile Mo?O?Cl etch by-products.

Consecutive and Selective Chemical Vapor Deposition of Pt/Al Bilayer Electrodes for TiO2 Resistive Switching Memory

This paper demonstrated a new method for consecutive and selective chemical vapor deposition (CVD) of Pt and Al on a TiO2 surface in the presence of a highly hydrophobic 1H,1H,2H,2H-perfluorodecyltrichlorosilane (PFS) monolayer. The printed PFS monolayers effectively served as a monolayer resist for the consecutive CVD of Al and Pt in the fabrication of the patterned, robust Pt/Al bilayer electrodes for TiO2 resistive switching random access memory (ReRAM) devices. The Al underlayer promoted the nucleation and the growth of the CVD Pt, and thus provided a base for a more uniform and thicker deposition of Pt than bare TiO2 surfaces. In addition, the enhanced adhesion of Pt with the additional Al layer significantly improved the endurance of the resistive switching TiO2 thin film. Thus this bottom-up approach may be well extended in the fabrication of next generation devices.

Erratum to: Self-assembled Nanolayers as Interfacial Diffusion Barriers for Thermally Stable and Low Contact Resistance Cu Source/Drain Electrode in a-Si:H TFT-LCDs

We demonstrate that mercaptoundecanoic acid (MUA) organic layers enhance adhesion and prevent Cu diffusion in Cu/Si structures; the Cu/MUA/Si structures are thermally stable at 200°C and exhibit strong adhesion of Cu to Si due to the strong chemical interaction of Cu with the S terminal groups as well as to the interaction of Si with the -COOH group of MUA. The specific contact resistance of the Cu/MUA/n +-Si structures is in the range of 6.8×10−3−1.84 Ω-cm2, depending on the dopant concentration of n +-Si. The fabricated Cu/MUA source/drain (S/D) electrode a-Si:H TFTs exhibit an electron mobility of 0.79 cm2/V-s, Ion/Ioff ratio of 3.78 × 106, and specific contact resistance of 1.84 Ω-cm2, revealing the successful application of the SAM-based diffusion barrier to the S/D contacts of Si devices.