Choong-Mo Nam

High-performance planar inductor on thick oxidized porous silicon (OPS) substrate

To obtain a high-performance planar inductor, we used the oxidized porous silicon (OPS) layer with 25-μm-thick SiO2 as substrate. The measured radio frequency (RP) performances of the planar Inductor on the OPS layer are comparable to those on the semi-insulating GaAs substrate. For a 6.29 nH inductor, resonant frequency of 13.8 GHz and maximum quality factor (Q) of 13.3 are obtained. These results show that the utilisation of the OPS layer can push silicon passive monolithic microwave integrated circuit (MMIC) technology at least up to 12 GHz.

High-performance air-gap transmission lines and inductors for millimeter-wave applications

The air-gap transmission lines and inductors are developed by new multilayer process. The developed transmission lines are air-gap coaxial line, air-gap strip line, air-gap coplanar waveguides (CPW), and air-gap buried microstrip line (BMSL). The air-gap transmission lines show very low signal loss and very high isolation performances. The transmission line loss of the coaxial line is less than 0.08 dB/mm up to 40 GHz. Those of the CPW, strip line and BMSL are about 0.07, 0.15, and 0.13 dB/mm, respectively. The isolation characteristics of the coaxial line and BMSL are measured. In case of the coaxial line with 2-mm coupling length and 60-μm distance between signal lines, the coupling is less than –52 dB up to 40 GHz. In case of the BMSL with the same conditions, the coupling is less than –43 dB. Therefore, the air-gap transmission line is very suitable structure for high performance and high-density RF application. Additionally, the air-gap inductors are monolithically fabricated using the same process of the transmission line. The fabricated inductors have very high quality factors, the maximum factor of 1.46-nH air-gap inductor is about 130. Using the developed multilayer process, we can realize various types of air-gap transmission lines (coaxial line, CPW, strip line and BMSL) and air-gap inductors simultaneously.

Coplanar waveguides on silicon substrate with thick oxidized porous silicon (OPS) layer

The problem of high dielectric loss of waveguide on silicon in the microwave region can be solved by utilizing a thick silicon dioxide layer that is formed by silicon substrate anodization and oxidation processes. Coplanar waveguides (CPWs) are fabricated on silicon substrate with a 20-μm-thick oxidized porous silicon (OPS) layer and demonstrate very high performance of 0.1-dB/mm attenuation at 4 GHz. Thus, the OPS process is promising for gigaherz applications of silicon substrates.

A multichip on oxide of 1 Gb/s 80 dB fully-differential CMOS transimpedance amplifier for optical interconnect applications

A 1.0 Gb/s 80 dB/spl Omega/ fully-differential TIA uses 0.25 /spl mu/m CMOS and multichip-on-oxide (MCO) process. MCO enables integration of PD, TIA, and planar inductors of Q=21.1 for shunt peaking on an oxidized silicon substrate. Interchannel crosstalk and power dissipation are <-40 dB and 27 mW, respectively. MCO and TIA chips are 5/spl times/5 mm/sup 2/ and 0.7/spl times/1 mm/sup 2/, respectively.

System in a package solution for RF receiver with SAW filter integration

An RF receiver module including a SAW filter in a package has been developed for providing a system in a package (SIP) solution. The most significant feature for the receiver module is that the RF SAW (surface acoustic wave) filter is integrated within the package. A typical silicon substate with thick oxide on top (/spl sim/25 /spl mu/m) made it possible to implement the different technologies such as GaAs MMIC and SAW filter on a single substate. MCM-D technology using a silicon substrate in this paper shows the proper solution for a SIP. RF performance and basic circuit components such as inductors, capacitors, resistors and transmission lines are developed. To verify the application of a silicon substrate to a system, an RF receiver module having dual band/tri-mode functions (CDMA, AMPS, and PCS) is implemented on a silicon substrate. A low noise amplifier, RF SAW filter and mixer are integrated on a specialized silicon substrate and show 2.4/spl sim/3 dB NF and 27/spl sim/28 dB gain for PCS (1840/spl sim/1870 MHz) and CDMA (869/spl sim/894 MHz), respectively.

GaAs multichip packaging using the selectively oxidized porous silicon (SOPS) substrate

The selectively oxidized porous silicon (SOPS) substrate consists of a silicon region for GaAs multichip packaging and an oxidized porous silicon (OPS) region for integration of passive elements such as inductors, MIM capacitors, resistors and coplanar waveguides. This structure provides many advantages at microwave frequencies, such as neglect of the semiconducting nature of silicon, low signal attenuation, high thermal conductivity, etc. Using the SOPS substrate and GaAs MMICs, L-band multichip packaging is implemented for two GaAs broadband amplifier, interconnection and transmitter systems.

High performance air gap transmission lines for millimeter wave applications

The air gap transmission lines are developed by a new multi-layer process. The developed transmission lines are air gap coaxial line, air gap strip line and air gap BMSL (buried microstrip line). Air gap transmission lines show very low signal loss and very high isolation performances. The transmission line loss of the coaxial line is less than 0.08 dB/mm up to 40 GHz. Those of the strip line and the BMSL are about 0.15 dB/mm and 0.13 dB/mm, respectively. Reduction of the parasitic coupling between signal lines is very important in high-density MICs and MMICs. The isolation characteristics of the coaxial line and the BMSL are measured. In case of coaxial lines with 2 mm coupling length and 60 /spl mu/m distance between signal lines, the coupling is less than -52 dB up to 40 GHz. Under the same conditions, the coupling of the BMSL is less than -43 dB. Therefore the air gap transmission lines are very suitable structures for high performance and high-density RF applications.

The fabrication of oxidized porous silicon membrane and its application to RF module

An oxidized porous silicon (OPS) membrane has been formed by anodization, thermal oxidation, and wet etching of a silicon wafer. Since the thick OPS layer is hetero silicon-dioxide, ethylene diamine pyrocatechol (EDP) does not etch it and so the self-etch-stop becomes possible. Passive RF elements, including coplanar waveguides, MIM capacitors, and spiral inductors, have been fabricated on this membrane and we have measured their performances. Using the design library of passive elements on OPS and OPS membranes, we have developed a low noise amplifier (LNA) for 2 GHz applications. The key idea of this LNA is based on the Friis equation and an input matching block was implemented on a locally formed nearly lossless OPS membrane to minimize the noise figure (NF). The inductively degenerated single-stage LNA showed 14 dB gain, 1.35 dB NF, and 5 dB IIP3 at 24 mW power dissipation.

Low-Loss and High-Frequency Interconnection Technology on Membrane Supported by Porous Silicon Post

A coplanar waveguide (CPW) has been fabricated on a 40 µm-thick porous silicon layer and the measured maximum available gain is -0.59 dB/mm at 40 GHz. The coplanar waveguide is then released in the air by etching the porous silicon layer under the signal line, which is supported at each end by porous silicon posts. The porous silicon post is surrounded by silicon sidewalls and a dielectric layer to protect it from the etchant. The porous silicon layer can be etched in 0.25 wt% NaOH solution with the rate of more than 2.5 µm/min but metal patterns are not attacked significantly by the etchant when there is no protection mask for them. A 5-mm-long coplanar waveguide has a maximum available gain of -1.32 dB at 40 GHz and a return loss of less than -16 dB up to 40 GHz. A maximum available gain of -0.2 dB/mm at 40 GHz is obtained when the gap between the membrane and silicon substrate is 100 µm. Because of its low-loss characteristic, the coplanar waveguide can be used for RF interconnection and multichip module package applications.