Choong Sun Kim
KAIST
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Publication
Featured researches published by Choong Sun Kim.
Small | 2016
Choong Sun Kim; Seul Ki Hong; Jung-Min Lee; Dong-Soo Kang; Byung Jin Cho; Jung-Woo Choi
A graphene thermoacoustic loudspeaker with a thin polymer mesh is fabricated using screen-printing. An experiment with substrates of various free-standing areas shows that a higher sound pressure level can be achieved as compared to previously reported graphene thermoacoustic loudspeakers. Moreover, a modified equation to predict the sound pressure level of the thermoacoustic loudspeaker with a thin and patterned substrate is proposed and verified by experimental results.
ACS Applied Materials & Interfaces | 2016
Choong Sun Kim; Kyung Eun Lee; Jung-Min Lee; Sang Ouk Kim; Byung Jin Cho; Jung-Woo Choi
We built a thermoacoustic loudspeaker employing N-doped three-dimensional reduced graphene oxide aerogel (N-rGOA) based on a simple template-free fabrication method. A two-step fabrication process, which includes freeze-drying and reduction/doping, was used to realize a three-dimensional, freestanding, and porous graphene-based loudspeaker, whose macroscopic structure can be easily modulated. The simplified fabrication process also allows the control of structural properties of the N-rGOAs, including density and area. Taking advantage of the facile fabrication process, we fabricated and analyzed thermoacoustic loudspeakers with different structural properties. The anlayses showed that a N-rGOA with lower density and larger area can produce a higher sound pressure level (SPL). Furthermore, the resistance of the proposed loudspeaker can be easily controlled through heteroatom doping, thereby helping to generate higher SPL per unit driving voltage. Our success in constructing an array of optimized N-rGOAs able to withstand input power as high as 40 W demonstrates that a practical thermoacoustic loudspeaker can be fabricated using the proposed mass-producible solution-based process.
ACS Nano | 2016
Seul Ki Hong; Choong Sun Kim; Wan Sik Hwang; Byung Jin Cho
We demonstrate a hybrid integration of a graphene-based analog circuit and a silicon-based digital circuit in order to exploit the strengths of both graphene and silicon devices. This mixed signal circuit integration was achieved using a three-dimensional (3-D) integration technique where a graphene FET multimode phase shifter is fabricated on top of a silicon complementary metal-oxide-semiconductor field-effect transistor (CMOS FET) ring oscillator. The process integration scheme presented here is compatible with the conventional silicon CMOS process, and thus the graphene circuit can successfully be integrated on current semiconductor technology platforms for various applications. This 3-D integration technique allows us to take advantage of graphenes excellent inherent properties and the maturity of current silicon CMOS technology for future electronics.
Small | 2018
Joong Gun Oh; Kwanyong Pak; Choong Sun Kim; Jae Hoon Bong; Wan Sik Hwang; Sung Gap Im; Byung Jin Cho
A high-performance top-gated graphene field-effect transistor (FET) with excellent mechanical flexibility is demonstrated by implementing a surface-energy-engineered copolymer gate dielectric via a solvent-free process called initiated chemical vapor deposition. The ultrathin, flexible copolymer dielectric is synthesized from two monomers composed of 1,3,5-trimethyl-1,3,5-trivinyl cyclotrisiloxane and 1-vinylimidazole (VIDZ). The copolymer dielectric enables the graphene device to exhibit excellent dielectric performance and substantially enhanced mechanical flexibility. The p-doping level of the graphene can be tuned by varying the polar VIDZ fraction in the copolymer dielectric, and the Dirac voltage (VDirac ) of the graphene FET can thus be systematically controlled. In particular, the VDirac approaches neutrality with higher VIDZ concentrations in the copolymer dielectric, which minimizes the carrier scattering and thereby improves the charge transport of the graphene device. As a result, the graphene FET with 20 nm thick copolymer dielectrics exhibits field-effect hole and electron mobility values of over 7200 and 3800 cm2 V-1 s-1 , respectively, at room temperature. These electrical characteristics remain unchanged even at the 1 mm bending radius, corresponding to a tensile strain of 1.28%. The formed gate stack with the copolymer gate dielectric is further investigated for high-frequency flexible device applications.
Applied Energy | 2018
Choong Sun Kim; Gyu Soup Lee; Hyeongdo Choi; Yongjun Kim; Hyeong Man Yang; Se Hwan Lim; Sang-Gug Lee; Byung Jin Cho
ACS energy letters | 2018
Choong Sun Kim; Hyeong Man Yang; Jinseok Lee; Gyu Soup Lee; Hyeongdo Choi; Yongjun Kim; Se Hwan Lim; Seong Hwan Cho; Byung Jin Cho
Nano Energy | 2018
Hyeongdo Choi; Yongjun Kim; Choong Sun Kim; Hyeong Man Yang; Min-Wook Oh; Byung Jin Cho
Advanced Materials Interfaces | 2017
Yongjun Kim; Sun Jin Kim; Hyeongdo Choi; Choong Sun Kim; Gyusoup Lee; Sang-hyun Park; Byung Jin Cho
IEEE Transactions on Electron Devices | 2018
Seung-Yoon Kim; Jae Hoon Bong; Dong Jun Kim; Choong Sun Kim; Hyeongdo Choi; Wan Sik Hwang; Byung Jin Cho
Energy | 2018
Yongjun Kim; Hyun Mo Gu; Choong Sun Kim; Hyeongdo Choi; Gyusoup Lee; Seongho Kim; Kevin K. Yi; Sang Gug Lee; Byung Jin Cho