Chouho Yamagishi

Growth of GaAs microcrystal by Ga droplet formation and successive As supply with low-pressure metalorganic chemical vapor deposition

Abstract GaAs microcrystals were grown by the combination of Ga droplet formation and successive As supply with low-pressure metalorganic chemical vapor deposition. The Ga droplets were formed by Ga(CH 3 ) 3 supply, and they were transformed to GaAs microcrystals by successive AsH 3 supply. The size and the density of the GaAs microcrystals were controlled by the deposition of the Ga droplets. Several photoluminescence peaks with high intensities were observed from the GaAs microcrystals sandwiched with AlGaAs layers.

Method to Obtain Low-Dislocation-Density Regions by Patterning with SiO2 on GaAs/Si Followed by Annealing

A method to obtain low-dislocation-density regions in GaAs on Si has been proposed. The method comprises performing the thermal cycle for GaAs, which is partially covered by SiO2 patterning, on Si. Dislocations in the GaAs layer on Si are gathered at the periphery of the SiO2 pattern due to surface stress modulation. This method yields the dislocation density of less than 105 cm-2 in the uncovered region.

A 20-Gb/s flip-flop circuit using direct-coupled FET logic

A new type of direct-coupled FET logic (DCFL) flip-flop called the memory cell type flip-flop (MCFF) is presented. The MCFF operates faster than conventional DCFL flip-flops and enhances the DCFLs advantages, such as low power consumption and high packing density. A D-flip-flop IC and a 1/8 divider IC were developed using the MCFF. These ICs were fabricated using 0.2- mu m-gate pseudomorphic inverted HEMTs. The D-flip-flop IC is confirmed to operate up to 20 Gb/s. The 1/8 divider is toggled up to a maximum frequency of 25 GHz. These results prove that the MCFF enables DCFL circuits applicable not only to large-scale integration but to small-scale and medium-scale integration operating up to 20 Gb/s as well. >

Reduction of threading dislocations in GaAs on Si by the use of intermediate GaAs buffer layers prepared under high V–III ratios

Abstract We have shown that the insertion of a GaAs layer prepared by organometallic vapor phase epitaxy under very high (VH) V–III ratios into a GaAs/Si epitaxial structure improves its crystallinity after thermal cycle annealing (TCA). The PL intensity of the upper GaAs epilayer with the VH-V/III GaAs intermediate buffer layer is found to be larger than that with a normal GaAs layer. It is also observed in cross-sectional TEM that the number of through dislocations is smaller for the sample with this novel buffer layer and most threading dislocations are confined to below the buffer layer after TCA, which is in good agreement with the PL result. We tentatively attribute the origin of this improvement of the GaAs/Si epilayer to an increased concentration of Ga vacancies which will migrate and relieve the tensile stress.

Reduction of Stress in GaAs with In-Doped GaAs Intermediate Layer Grown on Si Substrate by Metalorganic Chemical Vapor Deposition

This paper is the first report on the In doping effect to control the stress in the GaAs layer on a Si substrate. The wafer bending of InGaAs on Si decreases as the In concentration increases. The wafer bending linearly changes with the growth temperature, in contrast to undoped GaAs on Si in which the wafer bending is not changed with the growth temperature. By inserting the In-doped layer as an intermediate layer between GaAs and the Si substrate, the stress and dislocation in the upper undoped GaAs layer are reduced. These results show the possibility of controlling the stress and the dislocation in the GaAs layer on Si.

Study of Anodic Film Growth on GaAs and Bi2Te3 by in situ Photoacoustic Technique

Anodic film growth on GaAs and Bi2Te3 during the anodization process was observed with an in situ photoacoustic technique. It was shown that the time dependence of the normalized change in the photoacoustic signal reflects the anodic film growth on GaAs and Bi2Te3. The photoacoustic technique is complementary to the differential reflectance technique; the measured quantity is a change in transmittance of the electrolyte-anodic film-substrate system for the former case and a change in reflectance of the three phase system for the latter case. Experimental results obtained in the photoacoustic measurements are discussed in relation to those previously obtained in the differential reflectance and in situ ellipsometry measurements.

Observation of Anodic Film Growth of Bi2Te3 by in situ Photoacoustic Technique

The anodization process of Bi2Te3 under constant current condition has been observed using the in situ photoacoustic technique. The time dependence of the photoacoustic signal shows a periodically varying structure which reflects the layered crystal structure of Bi2Te3. The varying aspect of the photoacoustic signal is understood in terms of its two-dimensional growth. The photoacoustic technique is shown to be complementary to the differential reflectance method for studying the anodization process of semiconductors; the former measures change in transmittance and the latter change in reflectance of the anodic film-substrate system.

Improvement in photovoltaic conversion efficiency of InGaP solar cells grown on Si substrate by thermal cleaning using Si2H6

Abstract A new type of thermal cleaning for Si surfaces, using Si 2 H 6 , has been developed for growing GaAs buffer layers with an A-step surface on an Si substrate by metaloraganic vapor-phase epitaxy (MOVPE). This process made it possible, for the first time, to grow an A-step surface InGaP solar cell structure on an Si substrate with good surface morphology. An improvement in photovoltaic conversion efficiency has been achieved by this newly developed process.

Recrystallization of Ge on SiO2 using SrF2 seed by pseudo-line electron beam annealing

Recrystallization of Ge on SiO2 on GaAs substrates by lateral epitaxy using SrF2 seed was studied. Trapezoidal modulation was applied for the pseudo-line electron beam annealing to obtain uniform and large single crystalline layers for the first time. Optimizing the conditions of the electron beam annealing, single crystalline Ge regions as large as 0.3 mm×0.8 mm were obtained successfully. The GaAs layer grown on Ge showed good morphology and crystallinity.

20 Db/s DCFL D-flip flop and 2:1 selector ICs using pseudomorphic inverted HEMTs

A D-flip flop IC and a 2:1 selector IC using DCFL have been developed for applications operating above 10 Gb/s. Memory cell type flip flop (MCFF) is used for the D-flip flop IC. These ICs are fabricated using 0.2 mu m gate pseudomorphic inverted HEMTs (high electron mobility transistors), which show a high transconductance of 580 mS/mm, a high cutoff frequency of 110 GHz, and a low drain conductance of 17 mS/mm. The operations of the D-flip flop and the 2:1 selector ICs are confirmed up to 20 Gb/s by a measurement system composed of these ICs. The power dissipation is 430 mW for the D-flip flop IC and 170 mW for the 2:1 selector IC.<<ETX>>