Koutarou Tanaka

A 20-Gb/s flip-flop circuit using direct-coupled FET logic

A new type of direct-coupled FET logic (DCFL) flip-flop called the memory cell type flip-flop (MCFF) is presented. The MCFF operates faster than conventional DCFL flip-flops and enhances the DCFLs advantages, such as low power consumption and high packing density. A D-flip-flop IC and a 1/8 divider IC were developed using the MCFF. These ICs were fabricated using 0.2- mu m-gate pseudomorphic inverted HEMTs. The D-flip-flop IC is confirmed to operate up to 20 Gb/s. The 1/8 divider is toggled up to a maximum frequency of 25 GHz. These results prove that the MCFF enables DCFL circuits applicable not only to large-scale integration but to small-scale and medium-scale integration operating up to 20 Gb/s as well. >

A 36 GHz 1/8 frequency divider with GaAs BP-MESFETs

A 1/8 DCFL dynamic frequency divider has been developed with 0.2 mu m gate GaAs buried P-layer MESFETs (BP-MESFETs). The materials were grown by molecular beam epitaxy and the devices were fabricated with a stepped recess structure using a photolithographic technique. The fabricated MESFET with the circuits demonstrated a K-value of 506 mS/V/sub mm/, a g/sub m/ of 648 mS/mm, and an f/sub T/ of 96.1 GHz. The shortest propagation delay in a DCFL ring oscillator was 6.7 ps/gate at 20.8 mW/gate. The dynamic frequency divider operated at the maximum frequency of 36 GHz at room temperature. The devices operated in a very wide frequency range (7 GHz to 36 GHz).<<ETX>>

8 Gb/s 8:1 multiplexer and 1:8 demultiplexer IC's using GaAs DCFL circuit

High-speed 8:1 multiplexer and 1:8 demultiplexer ICs composed of GaAs direct-coupled FET logic (DCFL) have been designed and fabricated. The ICs were designed with a tree-type architecture and using memory-cell-type flip-flops (MCFFs). Self-aligned GaAs MESFETs with a gate length of 0.5 mu m were used in these ICs. The propagation delay time of the DCFL inverter was 19.0 ps/gate. Both ICs operated up to 8 Gb/s with power dissipations of 1.5 W for the multiplexer and 1.9 W for the demultiplexer at a single power supply voltage of 2.0 V. These ICs are applicable for multigigabit lightwave communication systems. >

High dynamic range variable gain amplifier for CDMA applications

A new attenuator and threshold voltage (Vth) compensation circuits using GaAs MESFET were designed and developed and this circuit was applied to develop a variable gain amplifier (VGA) for CDMA cellular phone systems. This VGA is packaged in an 8-pin plastic package and demonstrated high dynamic variable gain range (80 dB/100 MHz 70 dB/250 MHz 55 dB/500 MHz). High gain of 60 dB is observed for 85 MHz with low power consumption (Vdd=+2.7 V, Idd=6 mA). Since depletion mode MESFETs are used no negative supply is needed for gain control.

20 Db/s DCFL D-flip flop and 2:1 selector ICs using pseudomorphic inverted HEMTs

A D-flip flop IC and a 2:1 selector IC using DCFL have been developed for applications operating above 10 Gb/s. Memory cell type flip flop (MCFF) is used for the D-flip flop IC. These ICs are fabricated using 0.2 mu m gate pseudomorphic inverted HEMTs (high electron mobility transistors), which show a high transconductance of 580 mS/mm, a high cutoff frequency of 110 GHz, and a low drain conductance of 17 mS/mm. The operations of the D-flip flop and the 2:1 selector ICs are confirmed up to 20 Gb/s by a measurement system composed of these ICs. The power dissipation is 430 mW for the D-flip flop IC and 170 mW for the 2:1 selector IC.<<ETX>>