Christian Cojocaru

A 4-dB NF GPS receiver front-end with AGC and 2-b A/D

A dual-IF GPS receiver front-end integrates all the active circuitry to down-convert, amplify and digitize the 1,575.42 GHz L1 signal. The chip includes 3 dB NF LNA, 38 dB image reject mixer, VCO with integrated LC tank and varactor, PLL synthesizer, 55-dB range AGC with charge-pump control, 2-b A/D, crystal oscillator and TTL-compatible buffers. The receiver noise figure is 4 dB and maximum gain is 120 dB with a power consumption of 49 mA at 3 V supply. The AGC and 2-b A/D offer better SNR and significantly better blocking performance than the commonly used 1-b quantizers.

Low power Bluetooth for headset applications

Bluetooth headsets demand high radio performance at extreme low power consumption. A Bluetooth (BT) transceiver implemented in a 0.5 /spl mu/m BiCMOS process is supplied at 1.8 V and consumes less than 24mA when receiving and less than 18mA when transmitting. The receiver has -91dBm sensitivity and best-in-class blocker performance. Architecture, circuits and radio performance are reviewed. A Bluetooth headset based on this transceiver consumes 12mA in a 64kb/s HV3 voice link, has 10h talk time and weighs only 14g.

300 W 4Q PV inverter using new high density control integrated circuits

Increased component integration is essential for new power circuit platforms to decrease cost and size, and increase efficiency and reliability. A 300 W four quadrant (4Q) photo-voltaic grid-tied micro-inverter using two new ASICs (Application Specific Integrated Circuits) was built and characterized. This inverter incorporates maximum power point tracking and dynamically operates throughout a power factor range of 0.9 leading to 0.9 lagging, based on grid voltage, to comply with the California Electrical Commissions (CEC) rule 21 requirements. The CEC weighted efficiency of the inverter is higher than 95.5%. Total demand distortion is less than 2% up to the 39th harmonic.

High level integration for solar inverter power applications

High level IC integration in power electronic circuits is increasingly important for new circuit designs. This integration is essential in order to decrease the components used which inherently increases the reliability and decreases the cost and size of an application. A functional description and fully characterized test results of a novel architecture called an Analog Power Manager (APM) integrated circuit is discussed. The IC integrates two 90V High-Side Drivers (HSD), two 2A drive Low-Side Drivers (LSD), three 20MHz bandwidth 90V dividers and two 90 V precision dividers together with a hysteretic Flyback controller with 90 V switch. The APMs functions are used for sensing, power management and MOSFET driving in PV applications. All three functions will be presented in this work.