Christophe J. Chevallier

A 0.13µm 64Mb multi-layered conductive metal-oxide memory

A number of technologies have been proposed to replace NAND Flash as scaling becomes more difficult [1–2]. One promising area includes resistive memories using the conductive metal oxide (CMOx™) technology where multiple memory layers can be stacked [3]. Earlier attempts have been made with non-rewritable materials [4]. The key concepts for a very high density, multi physical layer nonvolatile, rewritable memory have been developed on a 64Mb, 130 nm test chip.

Low power cross-point memory architecture

Design techniques are described for building cross-point resistive memory arrays without the use of a selection device for each resistive memory element. A memory cell selection technique is shown to allow the use of low voltage transistors and to solve IR drop, electro-migration and disturb issues on the selected array lines. Physical implementation is also presented.