Chuan-Xin Huang

Effect of hafnium doping on density of states in dual-target magnetron co-sputtering HfZnSnO thin film transistors

This study investigates the effect of hafnium doping on the density of states (DOSs) in HfZnSnO thin film transistors fabricated by dual-target magnetron co-sputtering system. The DOSs is extracted by temperature-dependent field-effect measurements, and they decrease from 1.1 × 1017 to 4.6 × 1016 eV/cm3 with increasing the hafnium concentrations. The behavior of DOSs for the increasing hafnium concentration HfZnSnO thin film transistors can be confirmed by both the reduction of ΔVT under bias stress and the trapping charges calculated by capacitance voltage measurements. It suggests that the reduction in DOSs due to the hafnium doping is closely related with the bias stability and thermal stability.

Nitrogen anion doping as a strategy to suppress negative gate-bias illumination instability of ZnSnO thin film transistor

This work presents a strategy of nitrogen anion doping to suppress negative gate-bias illumination instability. The electrical performance and negative gate-bias illumination stability of the ZnSnON thin film transistors (TFTs) are investigated. Compared with ZnSnO-TFT, ZnSnON-TFT has a 53% decrease in the threshold voltage shift under negative bias illumination stress and electrical performance also progresses obviously. The stability improvement of ZnSnON-TFT is attributed to the reduction in ionized oxygen vacancy defects and the photodesorption of oxygen-related molecules. It suggests that anion doping can provide an effective solution to the adverse tradeoff between field effect mobility and negative bias illumination stability.

Temperature stress on a thin film transistor with a novel BaZnSnO semiconductor using a solution process

We have fabricated novel BaZnSnO-TFT using a solution process and investigated the electrical performance and temperature stability. BaZnSnO-TFT shows an improved field-effect mobility of 3.2 cm2 V−1 s−1, a subthreshold swing of 0.61 V per decade and an on/off current ratio of 2 × 107 compared to those of ZnSnO-TFT. Density of state distribution of BaZnSnO and ZnSnO semiconductor has been extracted from electrical measurements. BaZnSnO-TFT shows an improved electrical performance and temperature stability due to smaller oxygen vacancies, less bulk trap density and interface state density.

Amorphous LaZnSnO thin films by a combustion solution process and application in thin film transistors

Amorphous LaZnSnO thin films with different La doping concentration are prepared by a combustion solution process and the electrical performances of thin film transistors (TFTs) are investigated. The influence of La content on the structure, oxygen vacancies, optical and electrical performance of LaZnSnO thin films are investigated. At an appropriate amount of La doping (15 mol.%), LaZnSnO-TFT shows a superior electrical performance including a mobility of 4.2 cm2/V s, a subthreshold swing of 0.50 V/decade and an on/off current ratio of 1.9 × 107. The high performance LaZnSnO-TFT is attributed to the better interface between SiO2 and LaZnSnO channel layer and the suppression of oxygen vacancies by optimizing La content. It suggests that La doping can be a useful technique for fabricating high performance solution-processed oxide TFTs.

Suppression in the Negative Bias Illumination Instability of ZnSnO Thin-Film Transistors Using Hafnium Doping by Dual-Target Magnetron Cosputtering System

In this paper, the highly improved negative bias illumination stress (NBIS) stability of zinc-tin-oxide (ZTO) thin-film transistors (TFTs) is achieved by Hf doping, using dual-target magnetron cosputtering system. Compared with a large negative threshold voltage shift (ΔVT) of 9 V in pristine ZTO TFT, the Hf-doped ZTO TFTs shows superior stability and device D only shows 1.9 V negative ΔVT under the same NBIS. The enhancement in NBIS stability of Hf-doped ZTO TFTs is attributed to a lower oxygen vacancy concentrations and a fewer interface trap states suppressed by Hf ion. The decrease of oxygen vacancy concentrations and interface trap states are confirmed by X-ray photoelectron spectroscopy measurement and capacitance voltage (C-V) measurement, respectively. It is consistent with trap density extracted from temperature-dependent field-effect measurements, which verifies further the factor of the improvement of in NBIS stability of Hf-doped ZTO TFTs.

A comparison of density of states between InGaZnO based TFTs and InZnO based TFTs

ABSTRACT We investigate thermally induced instability of thin film transistors with incorporating sputtered InZnO and InGaZnO as the channel layer at room temperature, using density of states extracted from temperature-dependent field-effect measurements method and falling rates of activation energy. The trends between density of states and stability under temperature stress are entirely consistent with each other in respect of the reduction of total traps with different channel layer. Moreover, the instability for InGaZnO based TFTs and InZnO based TFTs has been investigated under positive gate bias stress, and the device with InGaZnO channel layer shows a slighter positive threshold voltage shift than that of InZnO based device under positive bias stress. This result demonstrates that the stability of the device is closely related with the density of states.

Realization of solution-processed semiconducting single-walled carbon nanotubes thin film transistors with atomic layer deposited ZrAlOx gate insulator

In this study, the semiconducting single-walled carbon nanotube (semi-SWCNT) thin film transistors (TFTs) with high dielectric constant (κ) atomic layer deposited ZrAlOx gate insulator are fabricated by the drop-casted method. The hysteresis characteristic, negative gate voltage stress stability, and thermal stability are studied, and the semi-SWCNT TFTs with ZrAlOx gate insulators show a small hysteresis of 0.2 V, a little threshold voltage shift of 2.5 V under the negative gate voltage stress, and a threshold voltage shift of 2 V under the thermal stress. Such advantages are due to the amorphous structure and smooth surface of the atomic layer deposited ZrAlOx gate insulator, which induces less trap states. In addition, the thermal stress stability of semi-SWCNT TFTs is investigated. It is found that the behavior of semi-SWCNT TFTs under thermal stress obeys the thermally activated hopping model obviously. This model explains the threshold voltage shift of the device under thermal stress, which is very ...

Improved Negative Bias Illumination Stability and Thermal Stability of HfZnSnO/ZnSnO Thin-Film Transistor Using Double-Channel Structure by Cosputtering

Double-channel structure HfZnSnO/ZnSnO thin-film transistors (HZTO/ZTO TFTs) with a high electrical property and a superior stability under negative bias illumination stress (NBIS) or temperature stress (TS) is fabricated by cosputtering. Double-channel structure HZTO/ZTO TFT only suffers from 1.4 V negative threshold voltage shift (ΔVT) under the same NBIS and 6.3 V negative ΔVT under the same TS, but its mobility can also stay appropriately 8 cm2/Vs. The high performance, superior NBIS stability, and superior TS stability of HZTO/ZTO TFT are due to the effect of Hf doping on suppression of oxygen vacancies in HZTO top channel layer and high carrier concentration in a ZTO bottom channel layer, which can be confirmed by X-ray photoelectron spectroscopy (XPS) measurement and Hall effect measurement. In addition, based on the measurement of IDS-VG under various temperatures, the density of states (DOS) can be extracted from thermally excited drain current. The HZTO/ZTO TFT shows fewer DOSs than that of single ZTO TFT, and it is comparable with that of single HZTO TFT. This result can be well matched with the TS stability, NBIS stability, and XPS measurement.

Atomic Layer Deposited Zr x Al 1−x O y Film as High κ Gate Insulator for High Performance ZnSnO Thin Film Transistor

In this work, the high κ ZrxAl1−xOy films with a different Zr concentration have been deposited by atomic layer deposition, and the effect of Zr concentrations on the structure, chemical composition, surface morphology and dielectric properties of ZrxAl1−xOy films is analyzed by Atomic force microscopy, X-ray diffraction, X-ray photoelectron spectroscopy and capacitance-frequency measurement. The effect of Zr concentrations of ZrxAl1-xOy gate insulator on the electrical property and stability under negative bias illumination stress (NBIS) or temperature stress (TS) of ZnSnO (ZTO) TFTs is firstly investigated. Under NBIS and TS, the much better stability of ZTO TFTs with ZrxAl1−xOy film as a gate insulator is due to the suppression of oxygen vacancy in ZTO channel layer and the decreased trap states originating from the Zr atom permeation at the ZTO/ZrxAl1−xOy interface. It provides a new strategy to fabricate the low consumption and high stability ZTO TFTs for application.Graphical Abstract

Tuning the electrical performance and bias stability of a semiconducting SWCNT thin film transistor with an atomic layer deposited AlZrOx composite

Solution-processed semiconducting single-walled carbon nanotube (s-SWCNT) thin film transistors (TFTs) based on different atomic layer deposited AlZrOx insulators are fabricated and characterized. It is found that increasing the Al concentration in the AlZrOx insulator can reduce leakage current and decrease the surface roughness of the AlZrOx insulator. Compared with the device with a ZrO2 insulator, the electrical performance, including subthreshold swing, Ion/Ioff and hysteresis, and negative bias stability of s-SWCNT TFTs with the AlZrOx insulator has been significantly improved. The s-SWCNT TFT based on AlZrOx with a ZrO2/Al2O3 cycle ratio of 1/2 reveals a superior electrical performance with an average mobility of 35.2 cm2 V−1 s−1, a high on/off ratio of 3.7 × 105, a low subthreshold swing of 0.09, a small hysteresis of 0.1 V, and a small threshold voltage shift of 1.62 V under a negative bias stress of −3 V for 1800 s. The improvement of electrical performance and stability for the s-SWCNT TFT with the AlZrOx insulator is attributed to the smooth surface and less AlZrOx/s-SWCNT interface traps. Our results suggest that using a AlZrOx film as a gate insulator can be a useful technique to achieve high performance and more reliable solution-processed s-SWCNT TFTs.