Chuck Hong Ngai

Architecture and VLSI Implementation of the MPEG-2:MP@ML Video Decoding Process

This paper describes a recently developed silicon component that efficiently implements real-time decompression of an MPEG-2 encoded video data stream. The chip has been developed by IBM Corp. and is fully compliant with the MPEG-2 Draft Standard at MP@ML (Main Profile at Main Level). An overview of the MPEG-2 algorithm is presented, and the main characteristics of the video decoder chip are outlined. The descriptions and examples of particular internal coprocessors are given in terms of function and specific application environments

MPEG-2 Out of the Blue! (Or Lets Put an MPEG on a Square Chip)

The MPEG-2 Standard for digital motion video will be ratified as an international standard in late 1994. This paper describes a recently developed silicon component that efficiently implements real time decompression of an MPEG-2 encoded video data stream. The chip has been developed by IBM Corporation and is fully compliant with the MPEG-2 Draft Standard at MP@ML (Main Profile at Main Level). We include an overview of the MPEG-2 algorithm, and outline the main characteristics of the video decoder chip. Rather than going into details of the internal architecture of particular coprocessors, the descriptions and examples are given in terms of function and specific application environments.