Chun-Hsien Peng

A Highly-Efficient Multi-Band Multi-Mode All-Digital Quadrature Transmitter

A novel highly-efficient multi-band multi-mode all-digital quadrature transmitter is presented. In the transmitter, a switching-mode power amplifier (PA), also referred to as digital power amplifier (DPA), which consists of an in-phase PA (I-PA) and a quadrature PA (Q-PA), is controlled by the digital codewords based on an input signal to turn on and off the power cells inside the I-PA or the Q-PA. Due to the load interaction between the I-PA and the Q-PA, a 2-dimensional (2-D) digital pre-distortion (DPD) is applied to linearize the DPA. The whole transmitter is implemented in 40 nm CMOS LP process and occupies a die area of 0.7 mm2. The all-digital quadrature transmitter can support 20 MHz, 40 MHz, and 80 MHz WiFi signals, Band 38 and Band 40 LTE signals with class 3 output power, and Bluetooth BDR, EDR2, and EDR3 signals.

Digital predistortion for concurrent dual-band transmitter using a 2D LUT based method

The digital predistortion (DPD) technique has been utilized in radio-frequency power amplifier linearization for its low cost and good performance. However, the conventional single-band DPD design is not applicable to the concurrent dual-band transmitters since the cross modulations are induced. The two-dimensional (2D) polynomial based DPD has been proposed as a remedy. Despite its good performance, the main drawbacks are the high computational complexity for the identification of the DPD coefficients and the high implementation complexity. It is known that the look-up-table (LUT) based method, which has been applied in conventional single-band transmitters, can effectively overcome the problems. In this paper, we consider a 2D LUT based DPD for the concurrent dual-band transmitters. First, we formulate a cost function from which the elements of the tables can be obtained through the optimization. Then, we propose an adaptive algorithm using the gradient-descent (GD) method to conduct the search. Moreover, we propose a practical method to implement the GD method which can significantly reduce the computational and implementation complexities. Finally, some measurement results are presented to demonstrate that the proposed algorithm has the satisfactory performance.

A novel RF self test for a combo SoC on digital ATE with multi-site applications

Recently, system-on-chip (SoC) solutions have been realized by integrating not only complex digital processing but also extensive analog and radio frequency (RF) circuits in a single chip. This paper presents a novel RF self test methodology suitable for complex radio SoCs. The proposed methodology employs the digital processor embedded in an SoC to enable self-testing using low-cost digital automatic test equipments (ATE). Moreover, to achieve increased RF test coverage achievable through internal loopback, the embedded processor also utilizes a compact assisted test board and interfaces to it through simple general purpose I/Os (GPIO). The proposed self-test methodology has been successfully applied in the mass production (MP) of a 65nm CMOS combo SoC that includes Wi-Fi, Bluetooth, GPS and FM. The final test (FT) and wafer probe test (PT) of the SoC have been accomplished with a 3X reduction in total test time compared to conventional test methodology using RF instruments.

Joint TX/RX IQ Mismatch Compensation Based on a Low-IF Internal Feedback Architecture

Modern radios use in-phase (I) and quadrature-phase (Q) channels for transmission and reception. However, IQ matching for high image rejection ratio is difficult and costly to realize by pure analog circuit techniques. Therefore, digital-assisted IQ compensation is required. This paper presents a novel joint TX/RX IQ compensation (JTRC) algorithm for low-IF feedback architecture. Conventional approaches are based on time-domain processing of test tones or frequency-domain processing of pilots in orthogonal frequency-division multiplexing (OFDM) systems. In contrast, JTRC employs time-domain blind source separation (BSS) for both OFDM and non-OFDM based systems without placing a specific requirement on the type of test signal. For example, JTRC supports both tones and modulated signals. Moreover, JTRC can be performed in the background during normal transmission mode using the actual transmitted signal. Unlike other BSS approaches that can only compensate for RX IQ mismatches while assuming a matched transmitter, JTRC can jointly compensate for both TX and RX IQ mismatches. We present an in-depth analysis that validates the JTRC algorithm and show simulation results that demonstrate its effectiveness.