Cll Chris Bartels

Smoothness Constraints in Recursive Search Motion Estimation for Picture Rate Conversion

Many motion compensation algorithms are based on block matching. The quality of the block correlation depends on the validity of the brightness constancy assumption and the assumption of fixed translational motion within a block. These assumptions are invalid in areas with texture changes, noise, lighting changes, and rapid deformations. Smoothness priors should enforce stable estimates in these regions by propagating neighboring estimates, while preserving hard object boundaries (piecewise smoothness). Most motion estimation algorithms that successfully implement these constraints are computationally complex. In this paper, we show an intuitive and computationally efficient way to implement them within the framework of (real-time) recursive search, targeting consumer-market embedded devices with limited resources.

Optimization of Hierarchical 3DRS Motion Estimators for Picture Rate Conversion

There is a continuous pressure to lower the implementation complexity and improve the quality of motion-compensated picture rate conversion methods. Since the concept of hierarchy can be advantageously applied to many motion estimation methods, we have extended and improved the current state-of-the-art motion estimation method in this field, 3-D Recursive Search (3DRS), with this concept. We have explored the extensive parameter space and present an analysis of the importance and influence of the various parameters for the application of picture rate conversion. Since well-performing motion estimation methods for picture rate conversion show a tradeoff between prediction accuracy and spatial motion field consistency, determining the optimal tradeoff is an important part of the analysis. We found that the proposed motion estimators are superior to multiple existing techniques as well as standard 3DRS with regard to performance at a low computational complexity.

Comparison of An Æthereal Network on Chip and A Traditional Interconnect for A Multi-Processor DVB-T System on Chip

Growing complexity of multiprocessor systems on chip (MP-SoC) requires future communication resources that can only be met by highly scalable architectures. Networks-on-Chip (NoCs) offer this scalability and other advantages like modularity, quality-of-service (QoS), possibly smaller area footprint and lower power dissipation. Although many papers describe the advantages of NoCs and describe techniques to apply NoCs on certain application domains, few have actually employed the complete design chain to make a netlist level implementation and area comparison (Steenhof et al., 2006) and (Angiolini et al., 2006). This paper describes the application of the AEligthereal NoC to an existing bus-based MP-SoC design and an area comparison with the original interconnects structure down to netlist level

A system approach to high‐quality picture‐rate conversion

— Various techniques have been implemented to improve the motion portrayal of flat-panel displays, of which the widespread introduction of motion-compensated picture-rate conversion systems is an essential part. However, a careful design of such systems is critical as they have the potential to introduce perceptually annoying artifacts. In this paper, an overview of the required “ingredients” of high-quality motion-compensated picture-rate conversion is presented, as implemented in state-of-the-art systems-on-chip. The visual impact of individual components on picture quality is illustrated.

Direct Motion Estimation in the Radon Transform Domain using Match-Profile Backprojections

Integral projections have been proposed as an efficient method to reduce the dimensionality of the search space in motion estimation (ME) algorithms. A number of papers describe methods extending direct (correlation based) block matching algorithms with projections, others derive optical flow methods based on the Radon transform. With a single exception all of the above methods use a single horizontal and vertical projection to keep the ME algorithm computationally simple. In this work we derive a generalization on the direct projection methods: a ME method based on backprojections, and investigate the added value of using multiple projection angles.

Robust Motion Estimation Design Methodology

For motion-adaptive video retiming methods, the quest to lower the implementation complexity and improve the quality of motion estimation algorithms still continues. Comparing different motion estimators (MEs) and/or fine-tuning ME parameters is a time-consuming task, and it is even more demanding to identify the MEs with a robust performance among all the well-performing MEs. Therefore, a computer-aided design methodology is required to effectively explore the large design space. Such a methodology requires objective performance metrics. As it is hard to find perfect metrics, we present a design methodology that can use suboptimal measures and still identify robust MEs. The proposed methodology is demonstrated using two different MEs.

Comparison of an Æthereal Network on Chip and Traditional Interconnects - Two Case Studies

The growing complexity of multiprocessor systems on chip make the integration of Intellectual Property (IP) blocks into a working system a major challenge. Networks-on-Chip (NoCs) facilitate a modular design approach which addresses the hardware challenges in designing such a system. Guaranteed communication services, offered by the AEthereal NoC, address the software challenges by making the system more robust and easier to design. This paper describes two existing bus-based reference designs and compares the original interconnects with an AEthereal NoC. We show through these two case study implementations that the area cost of the NoC, which is dominated by the number of network connections, is competitive with traditional interconnects. Furthermore, we show that the latency in the NoC-based design is still acceptable for our application.