Connor J. McClellan

Energy Dissipation in Monolayer MoS2 Electronics

The advancement of nanoscale electronics has been limited by energy dissipation challenges for over a decade. Such limitations could be particularly severe for two-dimensional (2D) semiconductors integrated with flexible substrates or multilayered processors, both being critical thermal bottlenecks. To shed light into fundamental aspects of this problem, here we report the first direct measurement of spatially resolved temperature in functioning 2D monolayer MoS2 transistors. Using Raman thermometry, we simultaneously obtain temperature maps of the device channel and its substrate. This differential measurement reveals the thermal boundary conductance of the MoS2 interface with SiO2 (14 ± 4 MW m-2 K-1) is an order magnitude larger than previously thought, yet near the low end of known solid-solid interfaces. Our study also reveals unexpected insight into nonuniformities of the MoS2 transistors (small bilayer regions) which do not cause significant self-heating, suggesting that such semiconductors are less sensitive to inhomogeneity than expected. These results provide key insights into energy dissipation of 2D semiconductors and pave the way for the future design of energy-efficient 2D electronics.

Effective n-type doping of monolayer MoS 2 by AlO x

Doping of two-dimensional (2D) semiconductors often utilizes charge transfer techniques that are not compatible with standard CMOS fabrication and are unstable over time. Sub-stoichiometric oxides have demonstrated stable 2D material doping [1], but often degrade the subthreshold swing (S) and current on/off ratio (I<inf>max</inf>/I<inf>min</inf>) of a device. Here, we demonstrate that AlOx can n-dope monolayer (1L) MoS2 while preserving Imax/Imin and S. The AlO<inf>x</inf> doping significantly reduces the contact resistance (to 480 Ω·μm) while preserving the mobility (∼34 cm²V⁻¹s⁻¹) and S, ultimately achieving record on-current of 700 μA/μm for a monolayer semiconductor. We also present a model for the effect of interface traps on the transfer characteristics, which explains the experimentally obtained results.

Rapid Flame Synthesis of Atomically Thin MoO3 down to Monolayer Thickness for Effective Hole Doping of WSe2

Two-dimensional (2D) molybdenum trioxide (MoO3) with mono- or few-layer thickness can potentially advance many applications, ranging from optoelectronics, catalysis, sensors, and batteries to electrochromic devices. Such ultrathin MoO3 sheets can also be integrated with other 2D materials (e.g., as dopants) to realize new or improved electronic devices. However, there is lack of a rapid and scalable method to controllably grow mono- or few-layer MoO3. Here, we report the first demonstration of using a rapid (<2 min) flame synthesis method to deposit mono- and few-layer MoO3 sheets (several microns in lateral dimension) on a wide variety of layered materials, including mica, MoS2, graphene, and WSe2, based on van der Waals epitaxy. The flame-grown ultrathin MoO3 sheet functions as an efficient hole doping layer for WSe2, enabling WSe2 to reach the lowest sheet and contact resistance reported to date among all the p-type 2D materials (∼6.5 kΩ/□ and ∼0.8 kΩ·μm, respectively). These results demonstrate that flame synthesis is a rapid and scalable pathway to growing atomically thin 2D metal oxides, opening up new opportunities for advancing 2D electronics.

Direct observation of power dissipation in monolayer MoS 2 devices

We studied power dissipation in 1L MoS2 devices using Raman thermometry for the first time. We uncovered non-uniformities of power dissipation and the important role of the MoS2-substrate interface thermal resistance. These results provide critical insights for thermal design of devices based on 2D materials. This work was supported by the AFOSR, NSF EFRI 2-DARE, and Stanford SystemX.

Unipolar n-Type Black Phosphorus Transistors with Low Work Function Contacts

Black phosphorus (BP) is a promising two-dimensional (2D) material for nanoscale transistors, due to its expected higher mobility than other 2D semiconductors. While most studies have reported ambipolar BP with a stronger p-type transport, it is important to fabricate both unipolar p- and n-type transistors for low-power digital circuits. Here, we report unipolar n-type BP transistors with low work function Sc and Er contacts, demonstrating a record high n-type current of 200 μA/μm in 6.5 nm thick BP. Intriguingly, the electrical transport of the as-fabricated, capped devices changes from ambipolar to n-type unipolar behavior after a month at room temperature. Transmission electron microscopy analysis of the contact cross-section reveals an intermixing layer consisting of partly oxidized metal at the interface. This intermixing layer results in a low n-type Schottky barrier between Sc and BP, leading to the unipolar behavior of the BP transistor. This unipolar transport with a suppressed p-type current is favorable for digital logic circuits to ensure a lower off-power consumption.

Electronic, thermal, and unconventional applications of 2D materials

This invited talk will present recent highlights from our research on two-dimensional (2D) materials including graphene, boron nitride (h-BN), and transition metal dichalcogenides (TMDs). The results span from fundamental measurements and simulations, to device- and several unusual system-oriented applications which take advantage of unique 2D material properties. Basic electrical, thermal, and thermoelectric properties of 2D materials will also be discussed.

Electrons, phonons, and unconventional applications of 2D materials

This invited talk will present recent highlights from our research on two-dimensional (2D) materials including graphene, boron nitride (h-BN), and transition metal dichalcogenides (TMDs). The results span from fundamental measurements and simulations, to device- and several unusual system-oriented applications which take advantage of unique 2D material properties. Basic electrical, thermal, and thermoelectric properties of 2D materials will also be discussed.

WTe 2 as a two-dimensional (2D) metallic contact for 2D semiconductors

In this paper, WSe₂ FET contacted with thin metallic WTe₂ is demonstrated, at channel lengths down to 90 nm and current saturation up to 60 μA/μm. A temperature-dependent study suggests the presence of an intrinsic vdWg at the 2D-2D contact. Thus, ultra-thin WTe₂ could be preferred to graphene as a contact depinning layer.