Chris D. English

Intrinsic electrical transport and performance projections of synthetic monolayer MoS2 devices

We demonstrate monolayer (1L) MoS2 grown by chemical vapor deposition (CVD) with transport properties comparable to those of the best exfoliated 1L devices over a wide range of carrier densities (up to ~1013 cm−2) and temperatures (80–500 K). Transfer length measurements decouple the intrinsic material mobility from the contact resistance, at practical carrier densities (>1012 cm−2). We demonstrate the highest current density reported to date (~270 μA μm−1 or 44 MA cm−2) at 300 K for an 80 nm long device from CVD-grown 1L MoS2. Using simulations, we discuss what improvements of 1L MoS2 are still required to meet technology roadmap requirements for low power and high performance applications. Such results are an important step towards large-area electronics based on 1L semiconductors.

Approaching ballistic transport in monolayer MoS 2 transistors with self-aligned 10 nm top gates

We present the first study of 10 nm self-aligned top-gated field-effect transistors (SATFETs) based on monolayer MoS2. Using a novel fabrication process, we achieve record saturation current, IDsat > 400 μA/μm, sub-threshold slope down to 80 mV/dec and equivalent oxide thickness (EOT) ≈ 2.5 nm. Combining transistor modeling with careful gate capacitance and contact resistance measurements, we provide the first analysis of diffusive vs. ballistic transport in monolayer MoS2 FETs. Results indicate the onset of ballistic transport with transmission up to 0.25 at low temperature. We also suggest a feasible route to advance MoS2 transistors further to the ballistic limit.

Improving contact resistance in MoS 2 field effect transistors

MoS₂ is a material of interest for two-dimensional (2D) field effect transistors (FETs) [1-3], however contact resistance (R_c) remains a key limiting factor. Here we present a systematic study of contact resistance to MoS₂ using various metals with different deposition conditions, compared to detailed simulations. We find that decreasing the metal deposition pressure improves the metal-MoS2 interface and brings R_c for Au contacts to <;1 kΩ-μm, which is lower than previous reports with Ni, Sc, or Au [1,4]. Comparison to simulations suggest that while the contact resistivity is reasonably good (ρc ≈ 5·10^-7 Ω·cm²), the lateral access resistance limits Rc in MoS₂ FETs. This study is crucial for scalability of MoS₂ devices, also suggesting methods to further improve Rc.

Correction to Improved Contacts to MoS2 Transistors by Ultra-High Vacuum Metal Deposition

A text is required to explain the relationship between Figure 5a and 5b. The revised caption of Figure 5b, shown below, contains the new text: Figure 5: (b) ID vs VD for the smallest device measured (LC ≈ 20 nm) showing ID > 300 μA/μm, a record for a TMD FET at ∼70 nm contact pitch. The data in Figure 5a and 5b were obtained before and after a reduction in threshold voltage from VT ≈ 2 V to −2 V, respectively, after device stress up to VD = 3 V. The device was stable before and after this point, as shown by dual forward−backward sweeps revealing minimal hysteresis. The analysis and conclusions of our work remain unaffected. We thank Professor Per Lundgren (Chalmers University of Technology) for bringing this to our attention. Addition/Correction

High-field and thermal transport in 2D atomic layer devices

This paper reviews our recent results of high-field electrical and thermal properties of atomically thin two-dimensional materials. We show how self-heating affects velocity saturation in suspended and supported graphene. We also demonstrate that multi-valley transport must be taken into account to describe high-field transport in MoS2. At the same time we characterized thermal properties of suspended and nanoscale graphene samples over a wide range of temperatures. We uncovered the effects of edge scattering and grain boundaries on thermal transport in graphene, and showed how the thermal conductivity varies between diffusive and ballistic heat flow limits.

Electronic, thermal, and unconventional applications of 2D materials

This invited talk will present recent highlights from our research on two-dimensional (2D) materials including graphene, boron nitride (h-BN), and transition metal dichalcogenides (TMDs). The results span from fundamental measurements and simulations, to device- and several unusual system-oriented applications which take advantage of unique 2D material properties. Basic electrical, thermal, and thermoelectric properties of 2D materials will also be discussed.

Replacing copper interconnects with graphene at a 7-nm node

We examine graphene for interconnects within a 7-nm FinFET technology. Multiple scenarios considered alter dimensions and/or materials to reflect realistic graphene interconnect fabrication. Replacement is restricted up to the 3rd BEOL metal layer (M3) as graphene is advantageous over copper in terms of resistivity only for line widths < 30 nm. Initial standard-cell level analysis is extended to benchmarking of a commercial 32-bit processor for the most promising graphene interconnect scenario: horizontally oriented graphene interconnects with bulk resistivity (ρ0) of 1.5 μΩ-cm and stack height (h) of 20 nm. Full-chip energy-delay-product (EDP) improves up to ∼8% as the shorter graphene stack height reduces parasitic capacitances. We also consider the impact of graphene contact resistance on via resistances: although via resistance increases as much as 20×, low performance targets still demonstrate EDP improvement, suggesting further potential improvement from electronic design automation (EDA) tool optimization.

Electrons, phonons, and unconventional applications of 2D materials

This invited talk will present recent highlights from our research on two-dimensional (2D) materials including graphene, boron nitride (h-BN), and transition metal dichalcogenides (TMDs). The results span from fundamental measurements and simulations, to device- and several unusual system-oriented applications which take advantage of unique 2D material properties. Basic electrical, thermal, and thermoelectric properties of 2D materials will also be discussed.

Energy efficiency and conversion in 1D and 2D electronics

We review our recent studies at the intersection of energy, nanomaterials and nanoelectronics. Through careful high-field studies of two-dimensional (2D) devices based on graphene and MoS2, we have uncovered details regarding their physical properties and band structure. We have investigated thermoelectric effects in graphene transistors and phase-change memory (PCM) elements for low-power electronics. We find that low-power transistors and memory could be enhanced by built-in thermoelectric effects which are particularly pronounced at nanometer length scales. We have also examined heat flow in composites based on one-dimensional (1D) carbon nanotubes, and uncovered both the lower (diffusive) and upper (ballistic) limits of heat flow in 1D and 2D nanomaterials. Our results suggest fundamental limits and new applications that could be achieved through the co-design of geometry, interfaces, and selection of 1D and 2D nanomaterials.

Comparison of graphene nanoribbons with Cu and Al interconnects

We present a comparative study of graphene nanoribbon (GNR) interconnects (ICs) with sub-50 nm copper (Cu) and aluminum (AI) ICs. We extend existing models for all materials in order to understand the physical size effects that occur when the electron mean free path (AMFP) becomes comparable to the IC dimensions. We calibrate such models against the best publicly available data. We find that, depending on geometrical configuration, either Al or GNRs could hold advantages over Cu at linewidths <;10 nm.