Cui Guangzuo

Frame-Based Calculus of Solving Arithmetic Multi-Step Addition and Subtraction Word Problems

Computer-assisted instruction systems have been broadly applied to help students solving math word problems. However, these systems offer little help to students encountering multi-step arithmetic word problems that do not be stored in the predesigned database. MSWPAS is a computer simulation system of people’s arithmetic multi-step addition and subtraction word problems behavior, which composed of MSWPAS-NP and MSWPAS-CP. In MSMPAS-NP, the natural language of word problems are processed and reflected into frames, and in MSMPAS-CP, calculus is performed based on those frames. This paper focuses on MSMPAS-CP. Psychological theoretical foundation and knowledge representation of MSMPAS-CP are presented at first. A method of frame-based calculus for solving multi-step addition and subtraction word problems is proposed, and then the architecture of system and how it works are discussed. Finally, an experiment is carried out, which shows that the method of frame-based calculus can effectively solve multi-step word problems.

A cognitive model of human thinking

This paper, based on findings in brain organization and cognitive neuroscience, proposed a more low-level and plausible architecture of human cognition, called CAUT, which can demonstrate the diagram and mechanism of human thinking. Comparing with existing models, three changes are made: (1) a pathway called inner loop is added from motor controller to thalamus; (2) a memory controller is added in front of long-term declarative memory, which can judge whether the memory operation is retrieval or not; (3) two new modules, Active Object buffer (AO) and Active Action buffer, are separated out of the general working memory model. With CAUT architecture, a dynamic cognitive model is put out with which typical thinking processes can be interpreted and described more precisely. Problem solving are demonstrated with this model, and two typical problems, decision problem and search problem, are interpreted. Experiments with ACT-R indicate that CAUT is consistent with ACT-R in functional level, and the description can be easily transformed into ACT-R model, and CAUT architecture can be taken as a meta-description and design tool to construct cognitive model. Experiments with ACT-R also indicate the effectiveness of CAUT architecture.

A cognitive learning model in classroom interaction

This paper, based on the cognitive architecture of learning and thinking [7], proposes a cognitive learning model in classroom interaction, which bridges the gap between classroom interaction and learning outcome. In this model, a learning activity is defined as a cognitive matrix at a low level in which M rows and N columns are set, each row represents a logical cognitive step of learning procedure, and each column contains all the contents processed by a corresponding component in cognitive architecture. At the meantime, the learning outcome can be produced from contents of column LTDM, AO and AADM of cognitive architecture [7]. A memory consolidation model is also proposed and simulated with PDP tool. Experiment of teaching concept knowledge indicates the effectiveness of the proposed models.

Simultaneous Multithreading Fault Tolerance Processor

Transient fault detection mechanism is added to simultaneous multithreading architecture. By exploiting both ILP (Instruction Level Parallelism) and TLP (Thread Level Parallelism), Simultaneous Multithreading (SMT) Fault Tolerance Processor can be expected to achieve better tradeoff between performance and hardware cost than traditional Fault Tolerance Processors. Detailed simulations of 3 of SPEC95 benchmarks show that executing two redundant programs on the fault-tolerant microarchitecture takes only 40%–61% longer than running a single version of the program. The new instruction fetch algorithm enhances the performance by 0.4% ∼1% to most of the benchmarks we choose randomly.

SMID: A Semantic Model of Instructional Design

This paper proposes a general method on how to build a semantic model for instructional design. At the meantime, a semantic model for instructional design is also proposed (called SMID), which mainly includes ontology and processing module. SMID ontology includes several ontologies used in instructional design, such as knowledge object ontology, material object ontology, learning goal ontology, instructional strategy ontology, learning action ontology; SMID processing module means the processing method used in instructional design, including knowledge selection, instructional strategy selection, learning action sequence generation, learning resource generation. With J2EE Platform and Drool tools, the SMID system is implemented, and some experiments with real course are done and conclusions are also given.

Ontology-Based Learning Resource Dynamic Generation with Learning Goal

In this paper, based on ontology, a kind of system architecture is proposed to generate learning resource dynamically with learning goal, which is called LRDG. At the meantime, a semantic model and related processing methods are designed. The semantic model consists of knowledge object ontology, learning material ontology, learning action ontology and instructional strategy rule format. Processing methods include knowledge object decomposition, knowledge object selection, rule reasoning engine, and learning resource generation. With LRDG, the learning resource can be generated at learning time according to learner¿s present knowledge state. Also, a system is implemented with J2EE platform and Drool rule engine, and a prototype course is developed. At last, the author gives experiment result and draws conclusion.In this paper, based on ontology, a kind of system architecture is proposed to generate learning resource dynamically with learning goal, which is called LRDG. At the meantime, a semantic model and related processing methods are designed. The semantic model consists of knowledge object ontology, learning material ontology, learning action ontology and instructional strategy rule format. Processing methods include knowledge object decomposition, knowledge object selection, rule reasoning engine, and learning resource generation. With LRDG, the learning resource can be generated at learning time according to learner’s present knowledge state. Also, a system is implemented with J2EE platform and Drool rule engine, and a prototype course is developed. At last, the author gives experiment result and draws conclusion. KeywordsOntology; Semantic Model; Instructional Design; Learning Goal; Learning Resourc Dynamic Generation

MT ARM: multithreading implementation in Arm7 architecture

The ARM7 processor can only reduce preserving and recovering overhead on context-switch, but it can do nothing about pipeline hazard. This paper presents one kind of multithreading implementation of ARM7 Architecture (called MT ARM) to achieve high-speed responsibility to handle events by eliminating the pipeline hazards. The pipeline of MT ARM is composed of four stages: Thread Select, Instruction Fetch, Decoder and Execution, which manage to handle external and internal events much more efficiently. Especially, the Thread Select stage is in charge of thread switching caused by all events. Synthesis of its VHDL implementation indicates that MT ARM costs no more than 5% in size and the power keeps almost the same compared with non-multithreading implementation of ARM7.