D. Buttari

AlGaN/AlN/GaN high-power microwave HEMT

In this letter, a novel heterojunction AlGaN/AlN/GaN high-electron mobility transistor (HEMT) is discussed. Contrary to normal HEMTs, the insertion of the very thin AlN interfacial layer (/spl sim/1 nm) maintains high mobility at high sheet charge densities by increasing the effective /spl Delta/E/sub C/ and decreasing alloy scattering. Devices based on this structure exhibited good DC and RF performance. A high peak current 1 A/mm at V/sub GS/=2 V was obtained and an output power density of 8.4 W/mm with a power added efficiency of 28% at 8 GHz was achieved.

High-power polarization-engineered GaN/AlGaN/GaN HEMTs without surface passivation

In this paper, a high-power GaN/AlGaN/GaN high electron mobility transistor (HEMT) has been demonstrated. A thick cap layer has been used to screen surface states and reduce dispersion. A deep gate recess was used to achieve the desired transconductance. A thin SiO/sub 2/ layer was deposited on the drain side of the gate recess in order to reduce gate leakage current and improve breakdown voltage. No surface passivation layer was used. A breakdown voltage of 90 V was achieved. A record output power density of 12 W/mm with an associated power-added efficiency (PAE) of 40.5% was measured at 10 GHz. These results demonstrate the potential of the technique as a controllable and repeatable solution to decrease dispersion and produce power from GaN-based HEMTs without surface passivation.

Realization of wide electron slabs by polarization bulk doping in graded III–V nitride semiconductor alloys

We present the concept and experimental realization of polarization-induced bulk electron doping in III–V nitride semiconductors. By exploiting the large polarization charges in the III–V nitrides, we are able to create wide slabs of high-density mobile electrons without introducing shallow donors. Transport measurements reveal the superior properties of the polarization-doped electron distributions than comparable shallow donor-doped structures, especially at low temperatures due to the removal of ionized impurity scattering. Such polarization-induced three-dimensional electron slabs can be utilized in a variety of device structures owing to their high conductivity and continuously changing energy gap.

Power and linearity characteristics of field-plated recessed-gate AlGaN-GaN HEMTs

Record power density and high-efficiency operation with AlGaN-GaN high-electron mobility transistor (HEMT) devices have been achieved by adopting a field-plated gate-recessed structure. Devices grown on SiC substrate yielded very high power density (18.8 W/mm with 43% power-added efficiency (PAE) as well as high efficiency (74% with 6 W/mm) under single-tone continuous-wave testing at 4 GHz. Devices also showed excellent linearity characteristics when measured under two-tone continuous-wave signals at 4 GHz. When biased in deep-class AB (33 mA/mm, 3% I/sub max/) device maintained a carrier to third-order intermodulation ratio of 30 dBc up to a power level of 2.4 W/mm with 53% PAE; increasing bias current to 66 mA/mm (6% I/sub max/) allowed high linear operation (45 dBc) up to a power level of 1.4 W/mm with 38% PAE.

Origin of etch delay time in Cl2 dry etching of AlGaN/GaN structures

The etch delay time commonly found during dry etching of AlGaN and GaN has been experimentally proven to be due to the presence of hard–to–etch surface oxides. A BCl3 deoxidizing plasma, followed by a Cl2 etching plasma, was found to give dead-time-free aluminum-mole-fraction-independent etch rates. No selectivity between GaN and AlGaN has been observed up to an aluminum mole fraction of 35%. The aluminum-mole-fraction-dependent etch rates commonly reported in literature have been related to the different dead-times associated with dissimilar surface oxides, disproving the more common explanations in terms of the higher binding energy of AlN compared to GaN and/or the lower volatility of AlClx compared to GaClx.

p-capped GaN-AlGaN-GaN high-electron mobility transistors (HEMTs)

A novel p-capped GaN-AlGaN-GaN high-electron mobility transistor has been developed to minimize radio-frequency-to-dc (RF-DC) dispersion before passivation. The novel device uses a p-GaN cap layer to screen the channel from surface potential fluctuations. A low-power reactive ion etching gate recess combined with angle evaporation of the gate metal has been used to prevent gate extension and maintain breakdown voltage. Devices with gate lengths of 0.7 /spl mu/m have been produced on sapphire. Current-gain cutoff frequencies (f/sub /spl tau//) of 20 GHz and maximum frequencies of oscillation (f/sub max/) of 38 GHz have been achieved. Unpassivated devices demonstrated a saturated output power of 3.0 W/mm and peak power-added efficiency of 40% at 4.2 GHz (V/sub DS/ = +20 V).

Use of double-channel heterostructures to improve the access resistance and linearity in GaN-based HEMTs

Double-channel structures have been used in AlGaN/GaN high electron mobility transistors to reduce the access resistance. Carrier densities as high as 2.9/spl times/10/sup 13/ cm/sup -2/ and mobilities in the 1300 cm/sup 2//V/spl middot/s range have been obtained in the access region. Also, the correct design of the potential barrier between the different channels allowed tailoring the differential access resistance to enhance the linearity of the transistors. This increase in linearity has been measured as a flatter profile of the transconductance and cutoff frequency versus current and as an improvement of more than 2 dB in large-signal two-tone linearity measurements.

Systematic characterization of Cl 2 reactive ion etching for improved ohmics in AlGaN/GaN HEMTs

Pre-metal-deposition reactive ion etching (RIE) was performed on an Al/sub 0.3/Ga/sub 0.7/N/AlN/GaN heterostructure in order to improve the metal-to-semiconductor contact resistance. An optimum AlGaN thickness for minimizing contact resistance was determined. An initial decrease in contact resistance with etching time was explained in terms of removal of an oxide surface layer and/or by an increase in tunnelling current with the decrease of the AlGaN thickness. The presence of a dissimilar surface layer was confirmed by an initial nonuniform etch depth rate. An increase in contact resistance for deeper etches was experienced. The increase was related to depletion of the two-dimensional (2-D) electron gas (2-DEG) under the ohmics. Etch depths were measured by atomic force microscopy (AFM). The contact resistance decreased from about 0.45 /spl Omega/mm for unetched ohmics to a minimum of 0.27 /spl Omega/mm for 70 /spl Aring/ etched ohmics. The initial thickness of the AlGaN layer was 250 /spl Aring/. The decrease in contact resistance, without excessive complications on device processing, supports RIE etching as a viable solution to improve ohmic contact resistance in AlGaN/GaN HEMTs.

Improvement of DC, low frequency and reliability properties of InAlAs/InGaAs InP-based HEMTs by means of an InP etch stop layer

In this paper we report on the elimination of the kink effect and of the hot-electron degradation in InP-based HEMTs which results from the insertion of an InP etch stop layer on top of the InAlAs donor layer. We attribute this improvement to the passivation, by means of InP, of deep levels on the surface of the InAlAs, as demonstrated by transconductance frequency dispersion measurements.

Digital etching for highly reproducible low damage gate recessing on AlGaN/GaN HEMTs

A room temperature digital etching technique for aluminum gallium nitride has been developed. An oxidizing agent and an acid have been used in a two step etching cycle to remove aluminum gallium nitride in approximately 5-6 /spl Aring/ increments. The process has been characterized to be reasonably linear and highly repeatable, offering an alternative to currently not available gate recess etch stopper technologies. Recessed gate Al/sub 0.35/Ga/sub 0.65/N/GaN HEMTs on sapphire were compared to unrecessed devices realized on the same sample. A fivefold gate leakage decrease and negligible variations on breakdown voltage support digital recessing as a viable solution for highly reproducible low surface-damage gate recessed structures.