D. Dobrescu

From Ψ-MOSFET with silicon on oxide to Ψ-MOSFET with silicon carbide on nitride

The Ψ-MOSFET is a device used in SOI electrical characterization. The aim of this paper was to establish a comparison between these transistors made in four variants: (1) with silicon film on buried oxide; (2) with silicon carbide film on buried oxide; (3) with silicon film on buried nitride; and (4) with silicon carbide film on buried nitride. ATLAS software simulated these structures. Besides this virtual experiment, a more complex model for the flat-band voltage is provided.

Alternative methods of parameters extraction based on the Pseudo-MOS technique

The pseudo-MOS transistor is a dedicated device for in situ electrical characterization of the SOI wafers. In this paper were extracted some parameters for a 200nm Si-film manufactured in SIMOX technique. In this scope, experimental Curves I/sub D/-V/sub G/, I/sub D/-V/sub D/ in inversion and accumulation were used, This work presents an alternative method for the threshold and fiat-band voltages extraction, using the Non-linear Electrical Conduction Theorem.

The influence of buried insulator type and film thickness on threshold voltage of a partially and fully depleted SOI-MOSFET

Nowadays SOI technologies represent a milestone in the fabrication of devices and integrated systems on thin films. The analytical models for the threshold voltage are useful for many SOI devices. Our analysis has focused on partially and fully depleted films, achieved on insulators like oxide, nitride or oxinitride. This paper gives a simple and accurate estimation of the threshold voltage. The results were in a good agreement both with PISCES numerical simulations and with experimental data.

Modeling the suspended gate MOSFET used as voltage programmable switch

This paper is a new approach to investigate and model the behaviour of the SGMOSFET with an external force applied on the mobile gate. Mechanical influences on the device threshold voltage V/sub T/ are presented together with the advantages and the limitations of this operating regime of the SGMOSFET.

Image force effect on forward characteristic of a rectifier metal-semiconductor contact

The image force effect is appreciated, especially, for the reverse regime of the rectifier metal-semiconductor contact, causing a weak dependence of the saturation current on the applied voltage. Applying this concept to the forward bias, at high values of currents, the ideality factor has an important increase. Combining this effect with the effect of the series resistance, which is important in the same range of currents, an important depreciation of the rectifier properties is observed.

The small signal amplification of the gated diode operated in breakdown regime

In this paper we present a unity-gain follower amplifier based on a gated diode operated in breakdown regime in common cathode configuration. The amplifier has only one stage and it provides power amplification, high input impedance and a low output one. The maximum frequency that can be applied on the entrance of the amplifier so that the output remains undistorted is dependent on the bias current therefore it can be used also as a programmable low pass filter. The diode is fully characterized in order to set the bias in the linear region where the amplification is very close to one.

A SPICE modeling of the negative resistance breakdown region for the bipolar junction transistor

This paper presents and studies new developed SPICE models for the breakdown region of the junction transistor biased in the common-emitter configuration. In such case, the output electrical characteristic has a negative slope, especially for very small or negative base currents.

Self-bias frequency compensation technique for low cost charge/discharge CMOS oscillators

The present work proposes a self-bias compensation technique for the frequency supply voltage dependence in low cost charge/discharge oscillator topologies. The main bias current of the oscillator will include a supply voltage dependent current. The main goal is to reduce the supply voltage dependence for a range between 1.6 and 2V, for a current starved ring oscillator and a new charge/discharge modified topology. The added circuitry reduces significantly the frequency spread and has very low contribution to the current consumption and total area of the block.

Power MOSFET Verilog modelling

Power MOSFETs are electronic devices used for modern switches. The complexity of mixed-signal system-on-chip using power MOSFETs has increased. Advanced analog and digital interfaces, tough requirements for their safety and reliability impose new advanced methodologies for their simulations. Cadence Virtuoso offers a complex simulation environment including AMS, a mixed digital - analog simulation tool. Power MOSFETs behavioral models are needed for analog and digital simulations. Virtuoso AMS is a reference language in the mixed-signal environment, aimed to provide a good tradeoff between accuracy and speed in verification. This paper proposes a new approach in power MOS simulation using System Verilog for analog and digital simulation. A new model for a power transistor has been developed. The model was used for an analog simulation for a power stage circuit including a power MOSFET. The power stage was also simulated in Verilog, commonly used in the design and verification of digital circuits. The analog and digital outputs plotted in SimVision were in good agreement in order to validate the model.

Design and simulation of a piezoelectric sensor with applications in image stabilization

The piezoelectric materials used in the device industry with a very high market share are piezoceramics. They are used in medicine, robotics, mechanics but not least and the image stabilization. This material is easy to handle and with good properties related to mechanical and electric response. In full development are micro-electro-mechanical systems (MEMS) that bring with them new features, but also as small size, so they can be integrated into almost any device on the market. In this paper a piezoelectric accelerometer has been designed and optimized by simulation studies regarding the material and geometry. Based on electric response as function of mechanical deformation, an optimized geometry has been proposed and investigated by numerical analysis using Comsol Multiphysics software package. The simulation results for this new configuration are discussed and compared to basic accelerometers design.