D. E. Savage

Elastically relaxed free-standing strained-silicon nanomembranes

Strain plays a critical role in the properties of materials. In silicon and silicon–germanium, strain provides a mechanism for control of both carrier mobility and band offsets. In materials integration, strain is typically tuned through the use of dislocations and elemental composition. We demonstrate a versatile method to control strain by fabricating membranes in which the final strain state is controlled by elastic strain sharing, that is, without the formation of defects. We grow Si/SiGe layers on a substrate from which they can be released, forming nanomembranes. X-ray-diffraction measurements confirm a final strain predicted by elasticity theory. The effectiveness of elastic strain to alter electronic properties is demonstrated by low-temperature longitudinal Hall-effect measurements on a strained-silicon quantum well before and after release. Elastic strain sharing and film transfer offer an intriguing path towards complex, multiple-layer structures in which each layer’s properties are controlled elastically, without the introduction of undesirable defects.

Determination of roughness correlations in multilayer films for x-ray mirrors

Interfacial roughness in multilayer films may be random or correlated, i.e., replicated from layer to layer. It is shown that these can be separated and quantified using x‐ray diffraction rocking curves and a straightforward analysis. The lateral correlation length along the interfaces can additionally be determined. A quantitative evaluation for W/C multilayers shows that correlated roughness contributes significantly to the total roughness, even at length scales that are surprisingly short, of the order 2–6 nm.

Electronic transport in nanometre-scale silicon-on-insulator membranes

The widely used ‘silicon-on-insulator’ (SOI) system consists of a layer of single-crystalline silicon supported on a silicon dioxide substrate. When this silicon layer (the template layer) is very thin, the assumption that an effectively infinite number of atoms contributes to its physical properties no longer applies, and new electronic, mechanical and thermodynamic phenomena arise, distinct from those of bulk silicon. The development of unusual electronic properties with decreasing layer thickness is particularly important for silicon microelectronic devices, in which (001)-oriented SOI is often used. Here we show—using scanning tunnelling microscopy, electronic transport measurements, and theory—that electronic conduction in thin SOI(001) is determined not by bulk dopants but by the interaction of surface or interface electronic energy levels with the ‘bulk’ band structure of the thin silicon template layer. This interaction enables high-mobility carrier conduction in nanometre-scale SOI; conduction in even the thinnest membranes or layers of Si(001) is therefore possible, independent of any considerations of bulk doping, provided that the proper surface or interface states are available to enable the thermal excitation of ‘bulk’ carriers in the silicon layer.

Practical design and simulation of silicon-based quantum-dot qubits

Spins based in silicon provide one of the most promising architectures for quantum computing. Quantum dots are an inherently scalable technology. Here, we combine these two concepts into a workable design for a silicon-germanium quantum bit. The novel structure incorporates vertical and lateral tunneling, provides controlled coupling between dots, and enables single electron occupation of each dot. Precise modeling of the design elucidates its potential for scalable quantum computing. For the first time it is possible to translate the requirements of faulttolerant error correction into specific requirements for gate voltage control electronics in quantum dots. We demonstrate that these requirements are met by existing pulse generators in the kHzMHz range, but GHz operation is not yet achievable. Our calculations further pinpoint device features that enhance operation speed and robustness against leakage errors. We find that the component technologies for silicon quantum dot quantum computers are already in hand. Quantum computing offers the prospect of breaking out of the classical von Neumann paradigm that dominates present-day computation. It would enable huge speedups of certain very hard problems, notably factorization. Constructing a quantum computer (QC) presents many challenges, however. Chief among these is scalability: the 10 qubits needed for simple applications far exceed the potential of existing implementations. This requirement points strongly in the direction of Si-based electronics for QC. Silicon devices offer the advantage of long spin coherence times, fast operation, and a proven record of scalable integration. Specific Si-based qubit proposals utilize donor-bound nuclear or electronic spins as qubits. However, quantum dots can also be used to house electron spins, and they have the advantage that the electrostatic gates controlling qubit operations are naturally aligned to each qubit. These proposals describe an intriguing possibility. Our aim here is to describe a new SiGe qubit design, and, just as importantly, to carry out detailed modeling of a specific design for the first time. Modeling provides a proof of principle, pinpoints problem areas, and suggests new directions. The fundamental goal of our design is the ability to reduce the electron occupation of an individual dot precisely to one, as in vertically coupled structures. It may be possible to use the spin of multi-electron quantum dots as qubits, but single occupation is clearly desirable. The spin state “up” = 0 or “down” = 1 , stores the quantum bit of information. At the same time, it is necessary to have tunable coupling between neighboring dots. This is achieved by controlled movement of electrons along the quantum well that contains two dots. The solution is to draw on two distinct quantum dot technologies: lateral and vertical tunneling quantum dots. The design, shown in Fig. 1, incorporates a back-gate that serves as an electron reservoir, a quantum well that confines electrons vertically, and split top gates that provide lateral confinement by electrostatic repulsion. All semiconductor layers are formed of strainrelaxed x xGe Si 1 except the quantum well, which is pure, strained Si. Relaxation is achieved by step-graded compositional growth on a Si wafer. Here, we consider the composition 077 . 0 = x , consistent with a quantum well band offset meV 84 ≅ ∆ c E , with respect to theSpins based in silicon provide one of the most promising architectures for quantum computing. A scalable design for silicon-germanium quantum-dot qubits is presented. The design incorporates vertical and lateral tunneling. Simulations of a four-qubit array suggest that the design will enable single electron occupation of each dot of a many-dot array. Performing two-qubit operations has negligible effect on other qubits in the array. Simulation results are used to translate error correction requirements into specifications for gate-voltage control electronics. This translation is a necessary link between error correction theory and device physics.

High-speed strained-single-crystal-silicon thin-film transistors on flexible polymers

We fabricate thin-film transistors (TFTs) on both strained and unstrained single-crystal Si membranes transferred to flexible-polymer substrates. The active layer is transferred from the starting silicon on insulator (SOI) using a simple, fast, and reliable dry-printing method. When a multilayer Si∕SiGe∕Si structure is pseudomorphically grown on SOI and the buried oxide is selectively removed, strained Si with a negligible density of dislocations is achieved via elastic strain sharing between the SiGe alloy layer and the Si layers. Both the drain current and the transconductance of TFTs fabricated on this strained Si∕SiGe∕Si membrane after its transfer to the flexible polymer are much higher than of TFTs fabricated on the unstrained-Si counterpart.

Electrical control of a long-lived spin qubit in a Si/SiGe quantum dot

Nanofabricated quantum bits permit large-scale integration but usually suffer from short coherence times due to interactions with their solid-state environment. The outstanding challenge is to engineer the environment so that it minimally affects the qubit, but still allows qubit control and scalability. Here, we demonstrate a long-lived single-electron spin qubit in a Si/SiGe quantum dot with all-electrical two-axis control. The spin is driven by resonant microwave electric fields in a transverse magnetic field gradient from a local micromagnet, and the spin state is read out in the single-shot mode. Electron spin resonance occurs at two closely spaced frequencies, which we attribute to two valley states. Thanks to the weak hyperfine coupling in silicon, a Ramsey decay timescale of 1 μs is observed, almost two orders of magnitude longer than the intrinsic timescales in GaAs quantum dots, whereas gate operation times are comparable to those reported in GaAs. The spin echo decay time is ~40 μs, both with one and four echo pulses, possibly limited by intervalley scattering. These advances strongly improve the prospects for quantum information processing based on quantum dots.

Interfacial roughness correlation in multilayer films : influence of total film and individual layer thicknesses

A series of W/C multilayer films sputter deposited on Si(100) substrates with total thickness ranging from 400 to 6400 A and bilayer period from 20 to 160 A were examined to explore the variation of interfacial roughness and interfacial roughness correlation with film thickness and period. The films were characterized with x‐ray diffractometry. Average interfacial roughness is obtained from conventional (θ,2θ) scans, while information on roughness correlation is extracted from rocking‐curve (transverse‐profile) analysis. The magnitude of the roughness is found to depend more on bilayer period than on total film thickness. The observations suggest that interfaces retard the evolution of surface roughness and that thin ‘‘restarting’’ layers may be used to control the growth morphology of thin films.

Tunable Spin Loading and T-1 of a Silicon Spin Qubit Measured by Single-Shot Readout

The remarkable properties of silicon have made it the central material for the fabrication of current microelectronic devices. Silicon’s fundamental properties also make it an attractive option for the development of devices for spintronics [1] and quantum information processing [2–5]. The ability to manipulate and measure spins of single electrons is crucial for these applications. Here we report the manipulation and measurement of a single spin in a quantum dot fabricated in a silicon/silicon-germanium heterostructure. We demonstrate that the rate of loading of electrons into the device can be tuned over an order of magnitude using a gate voltage, that the spin state of the loaded electron depends systematically on the loading voltage level, and that this tunability arises because electron spins can be loaded through excited orbital states of the quantum dot. The longitudinal spin relaxation time T1 is measured using single-shot pulsed techniques [6] and found to be ∼ 3 seconds at a field of 1.85 Tesla. The demonstration of single spin measurement as well as a long spin relaxation time and tunability of the loading are all favorable properties for spintronics and quantum information processing applications. Silicon is a material in which spin qubits are expected to have long coherence times, thanks to the predominance of a spin-zero nuclear isotope and relatively weak spin-orbit coupling. However, silicon quantum dots have yet to demonstrate the reproducibility and controllability achieved in gallium arsenide devices [7–10]. Here, we demonstrate the control and manipulation of spin states of single electrons in a silicon/silicon-germanium (Si/SiGe) quantum dot and report the first single-shot measurements of the longitudinal spin relaxation time T1 in such devices. We also show that the presence of a relatively low-lying spin-split orbital excited state in the dot can be exploited to increase the speed and tunability of the loading of spins into the dot. Our results demonstrate that Si/SiGe quantum dots can be fabricated that are sufficiently tunable to enable single-electron manipulation and measurement, and that long spin relaxation times are consistent with the orbital and/or valley excitation energies in these systems. The measurements we report were performed on a gate-defined quantum dot with the gate configuration shown in Fig. 1a, tuned to be in the single-dot regime. The dot is measured at low temperature and in a parallel magnetic field. As shown in Fig. 1b, an electron can be loaded into one of four energy eigenstates; we denote 2.0 1.0 0.0 B (T) -0.158 -0.152

Fast Hybrid Silicon Double-Quantum-Dot Qubit

We propose a quantum dot qubit architecture that has an attractive combination of speed and fabrication simplicity. It consists of a double quantum dot with one electron in one dot and two electrons in the other. The qubit itself is a set of two states with total spin quantum numbers S(2)=3/4 (S=1/2) and S(z)=-1/2, with the two different states being singlet and triplet in the doubly occupied dot. Gate operations can be implemented electrically and the qubit is highly tunable, enabling fast implementation of one- and two-qubit gates in a simpler geometry and with fewer operations than in other proposed quantum dot qubit architectures with fast operations. Moreover, the system has potentially long decoherence times. These are all extremely attractive properties for use in quantum information processing devices.

Semiconductor Nanomembrane Tubes: Three-Dimensional Confinement for Controlled Neurite Outgrowth

In many neural culture studies, neurite migration on a flat, open surface does not reflect the three-dimensional (3D) microenvironment in vivo. With that in mind, we fabricated arrays of semiconductor tubes using strained silicon (Si) and germanium (Ge) nanomembranes and employed them as a cell culture substrate for primary cortical neurons. Our experiments show that the SiGe substrate and the tube fabrication process are biologically viable for neuron cells. We also observe that neurons are attracted by the tube topography, even in the absence of adhesion factors, and can be guided to pass through the tubes during outgrowth. Coupled with selective seeding of individual neurons close to the tube opening, growth within a tube can be limited to a single axon. Furthermore, the tube feature resembles the natural myelin, both physically and electrically, and it is possible to control the tube diameter to be close to that of an axon, providing a confined 3D contact with the axon membrane and potentially insulating it from the extracellular solution.