D. Eschweiler

The C-RORC PCIe card and its application in the ALICE and ATLAS experiments

The ALICE and ATLAS DAQ systems read out detector data via point-to-point serial links into custom hardware modules, the ALICE RORC and ATLAS ROBIN. To meet the increase in operational requirements both experiments are replacing their respective modules with a new common module, the C-RORC. This card, developed by ALICE, implements a PCIe Gen 2 x8 interface and interfaces to twelve optical links via three QSFP transceivers. This paper presents the design of the C-RORC, its performance and its application in the ALICE and ATLAS experiments.

O2: A novel combined online and offline computing system for the ALICE Experiment after 2018

ALICE (A Large Ion Collider Experiment) is a detector dedicated to the studies with heavy ion collisions exploring the physics of strongly interacting nuclear matter and the quark-gluon plasma at the CERN LHC (Large Hadron Collider). After the second long shutdown of the LHC, the ALICE Experiment will be upgraded to make high precision measurements of rare probes at low pT, which cannot be selected with a trigger, and therefore require a very large sample of events recorded on tape. The online computing system will be completely redesigned to address the major challenge of sampling the full 50 kHz Pb-Pb interaction rate increasing the present limit by a factor of 100. This upgrade will also include the continuous un-triggered read-out of two detectors: ITS (Inner Tracking System) and TPC (Time Projection Chamber)) producing a sustained throughput of 1 TB/s. This unprecedented data rate will be reduced by adopting an entirely new strategy where calibration and reconstruction are performed online, and only the reconstruction results are stored while the raw data are discarded. This system, already demonstrated in production on the TPC data since 2011, will be optimized for the online usage of reconstruction algorithms. This implies much tighter coupling between online and offline computing systems. An R&D program has been set up to meet this huge challenge. The object of this paper is to present this program and its first results.

Efficient management of large DMA memory buffers in microdrivers

Microdrivers run entirely in user space. The paradigm of such user-space device drivers has already shown to improve reliability and portability over pure kernel-space drivers. While the microdriver approach has been successful so far for low throughput and high latency use-cases such as USB, little research has been done on high performance applications. The Portable Driver Architecture (PDA) is a library which supports programming of microdrivers for high-speed PCI devices. This paper presents how it is possible to simplify large DMA buffer handling by using I/O Memory Management Units (IOMMU). Additionally, we optimized our library for intra-node communication in non-uniform memory access architectures.