D. Navarro

Asymmetrical voltage-cancellation control for full-bridge series resonant inverters

This paper presents and analyzes the asymmetrical voltage-cancellation (AVC) control, a generalized control technique for resonant inverters. It is applied to the popular full-bridge series resonant inverter. The proposed control technique achieves better efficiency performances than conventional fixed-frequency control strategies, while considering zero-voltage-switching operation, output power and load variations. The theoretical results are verified experimentally, using a prototype for an induction-heating cooking appliance.

Domestic Induction Appliances

In this paper several research topics pertaining to the design and modeling of domestic induction appliances are reviewed. Each topic is summarized, stressing its most significant advances and pointing to its future tendencies. A bibliographic review showing some of the published papers during the last years is included. The emphases and relative contributions of some of them are also discussed.

A Versatile Power Electronics Test-Bench Architecture Applied to Domestic Induction Heating

The design of new power-converter solutions optimized for specific applications requires, at a certain step, the design and implementation of several prototypes in order to verify the converter operation. This is a time-consuming task which also involves a significant economical cost. The aim of this paper is to present a versatile power electronics architecture which provides a tool to make the implementation and evaluation of new power converters straightforward. The adopted platform includes a versatile control architecture and a modular power electronics hardware solution. The control architecture is a field-programmable-gate-array-based system-on-programmable-chip solution which combines the advantages of the processor-firmware versatility and the effectiveness of ad hoc paralleled digital hardware. Moreover, the modular power electronics hardware provides a fast method to reconfigure the power-converter topology. The architecture proposed in this paper has been applied to the development of power converters for domestic induction heating, although it can be extended to other applications with similar requirements. A complete development test bench has been carried out, and some experimental results are shown in order to verify the proper system operation.

FPGA Implementation of a Switching Frequency Modulation Circuit for EMI Reduction in Resonant Inverters for Induction Heating Appliances

This paper presents the use of frequency modulation as a spread spectrum technique to reduce conducted electromagnetic interference (EMI) in the A frequency band (9-150 kHz) caused by resonant inverters used in induction heating home appliances. For sinusoidal, triangular, and sawtooth modulation profiles, the influence of peak period deviation in EMI reduction and in the power delivered to the load is analyzed. A digital circuit that generates the best of the analyzed modulation profiles is implemented in a field programmable gate array. The design is modeled in a very-high-speed integrated circuits hardware description language (VHDL). The digital circuit, the power converter, and the spectrum analyzer are simulated all together using a mixed-signal simulation tool to verify the functionality of the VHDL description. The spectrum analyzer is modeled in VHDL-analog and mixed-signal extension language (VHDL-AMS) and takes into account the resolution bandwidth stipulated by the EMI measurement standard. Finally, the simulations are experimentally verified on a 3.5 kW resonant inverter operating at 35 kHz.

FPGA-Based Power Measuring for Induction Heating Appliances Using Sigma–Delta A/D Conversion

This paper presents a field-programmable gate array (FPGA) implementation of a digital circuit that measures in real time the output power of medium-frequency (25-50 kHz) induction-heated cooking appliances. The voltage and current are sensed using first-order sigma-delta (SigmaDelta) analog-to-digital converters. The power-measuring algorithm is very simple while maintaining good accuracy. The algorithm is developed using a hardware description language (VHDL). The digital circuit, the power converter, the signal conditioning circuits, and the SigmaDelta modulators are simulated all together using a mixed-signal (analog + digital) simulation tool. The algorithm error is obtained in simulation computing the average power using VHDL-Analog and Mixed-Signal Extension Language (VHDL-AMS), and the influence of different parameters is analyzed. Finally, the digital circuit is implemented in the FPGA, and the simulations are experimentally verified.

The domestic induction heating appliance: An overview of recent research

In this paper several research topics pertaining to the design and modeling of domestic induction appliances are reviewed. Each topic is summarized, stressing its most significant advances and pointing to its future tendencies. A bibliographic review showing some of the published papers during the last years is included. The emphases and relative contributions of some of them are also discussed.

Efficiency optimization in ZVS series resonant inverters with asymmetrical voltage-cancellation control

This paper presents a time-domain analysis and a computerized search algorithm for optimizing the efficiency in zero-voltage switching (ZVS) full-bridge series resonant inverters with asymmetrical voltage-cancellation (AVC) control for different load quality factors. The optimum AVC control found allows all the switches to be turned on with zero voltage with the minimum switching frequency. In order to minimize losses, the switching frequency is kept as close as possible to resonance. The optimum AVC control is compared with previous fixed or narrow frequency range control strategies to show that it improves performance over all the output power range for different loads. The detailed steady-state analysis carried out here increases the precision of the first-harmonic analysis of a previous work, which is especially important with distorted output currents due to low load quality factors or highly asymmetrical modulation strategies. The theoretical results are verified experimentally.

High-Level Synthesis for Accelerating the FPGA Implementation of Computationally Demanding Control Algorithms for Power Converters

Recent advances in power electronic converters highly rely on the development of new control algorithms. These implementations often require complex control architectures featuring microprocessors, digital signal processors, and field-programmable gate arrays (FPGAs). Whereas software implementations are feasible for most power electronics practitioners, FPGA implementations with ad-hoc digital hardware are often a challenging design task. This paper deals with the design and development of control systems for power converters using high-level synthesis tools. In particular, the Xilinx Vivado HLS tool is evaluated for the design of a computationally demanding application, the real-time load estimation for resonant power converters using parametric identification methods. The proposed methodology allows the designer to use a high-level description language, e.g., C, to describe the identification algorithm functionality, and the tool automatically generates the hardware floating-point data-path and the control unit. Besides, it allows a fast design-space exploration through synthesis directives, and pipelining and parallelization are automatically performed to meet timing constraints. The evaluation performed in the study-case control architecture shows a significant design complexity reduction. As a consequence, high-level synthesis tools should be considered as a new paradigm in accelerating digital design for power conversion systems.

Real-Time FPGA-Based Hardware-in-the-Loop Simulation Test Bench Applied to Multiple-Output Power Converters

This paper presents a hardware-in-the-loop (HIL) simulation technique applied to a series-resonant multiple-output inverter for new multi-inductor domestic induction heating platforms. The control of the topology is based on a system-on-programmable chip (SoPC) solution, which combines the MicroBlaze embedded soft-core processor and a customized peripheral that generates the power converter control signals. The firmware is written in C, and the customized peripheral is described using a hardware description language. Simulating the whole system using digital or mixed-signal simulation tools is a very time-consuming task due to the embedded processor model complexity, and additionally, it does not support tracing C instructions. To overcome these limitations, this paper proposes a real-time simulation test bench. The embedded processor core, peripherals, and the power converter model are all implemented into the same field-programmable gate array (FPGA). Using the hardware and software debugging tools supplied by the FPGA vendor, currents and voltages of the power converter model are monitored, and firmware C instructions are traced while running on the embedded processor core. Then, it is presented a design flow that is proven to be an effective and low-cost solution to verify the functionality of the customized peripheral and to implement a platform to perform firmware verification.

Janus: An FPGA-Based System for High-Performance Scientific Computing

Janus is a modular, massively parallel, and reconfigurable FPGA-based computing system. Each Janus module has one computational core and one host. Janus is tailored to, but not limited to, the needs of a class of hard scientific applications characterized by regular code structure, unconventional data-manipulation requirements, and a few Megabits database. The authors discuss this configurable systems architecture and focus on its use for Monte Carlo simulations of statistical mechanics, as Janus performs impressively on this class of application.