D. Vignaud

Graphene FETs With Aluminum Bottom-Gate Electrodes and Its Natural Oxide as Dielectrics

In this paper, we present a fabrication process of graphene field effect transistors (GFETs) using natural oxidation of aluminum as dielectrics, which provide an alternative fabrication choice for future flexible electronics with the large scale and arbitrary substrates. The high-quality monolayer graphene is preserved by our process, and the mobility up to 3250 cm2/Vs is measured after whole device fabrication. GFETs with double bottom-gate structure varying from 300 to 100 nm in gate length have been characterized by both static and dynamic measurements. The total gate capacitances of our device structure are evaluated based on the measurement results of scattering parameters.We report an intrinsic current gain cutoff frequency ( ft-int) of 11 GHz and a maximum oscillation frequency ( fmax) of 8 GHz in devices with 100 nm gate length. Moreover, both the values of ft-int and fmax for different gate lengths are also discussed. Our results indicate that the full process exhibits great potential, especially for graphene-based flexible electronics.

RF characterization of epitaxial graphene nano-ribbon field effect transistors

RF characterization of epitaxial graphene nano ribbon field-effect transistor (GNRFET) was investigated. The few layers graphene were synthesized by thermal decomposition of {0001} silicon carbide under UHV environment. Raman spectroscopy, AFM and Hall measurement were used to investigate the properties of graphene synthesized. Despite the Hall mobility was lower than 500 cm2/Vs, the intrinsic current gain cut-off frequency of 60 GHz and maximum oscillation frequency of 30 GHz were obtained. This work shows the strong potentiality of GNRFET in future high speed electronics.

Influence of temperature on high frequency performance of graphene nano ribbon field effect transistor

We have fabricated an original graphene field effect transistor (FET) on silicon carbide (SiC) substrate. Based on an array of parallel graphene nano ribbons (GNRs), these devices are well suited for high frequency (HF) applications. Exploration of HF performance shows at room temperature intrinsic current gain cut-off frequency (ft) of 10 GHz and maximum oscillation frequency (fmax) of 6 GHz. At 77 K, we find out that these HF performance are improved by about 50% (ft and fmax are respectively 15 GHz and 10 GHz). These results show the strong dependence of temperature on device performance.

60 GHz current gain cut-off frequency graphene nanoribbon FET

We report investigations on the fabrication and characterization of graphene nanoribbon (GNR) field-effect transistors. Graphene layers are obtained from the thermal decomposition of a Si-face 4H-SiC substrate. To achieve high dynamic performance, a structure with an array of GNR connected in parallel was fabricated by e-beam lithography. The best intrinsic current gain cut-off frequency of 60xa0GHz and maximum oscillation frequency of 28xa0GHz were achieved. This study demonstrates the exciting potential of GNR in high-frequency electronics.

Low frequency transconductance and output resistance dispersion of epitaxial graphene nanoribbon-based field effect transistors

Graphene-based devices have recently attracted strong attention due to very promising features such as two-dimensional material properties and high carrier mobility [1]. Significant effort has been placed on studies of high frequency characteristics of graphene transistors [2, 3] and first low-frequency noise studies have been reported [4]. However the low-frequency transconductance and output resistance dispersion of graphene FETs are less understood. These play a major role in determining the device performance and are the subject of the studies reported in this paper. The channel or the ungated region of the device is usually responsible for such effects. The Graphene Nano Ribbon Field Effect Transistors (GNRFETs) reported here have been fabricated using an array of parallel graphene nano ribbons, described in [2]. The devices were dual gate FETs fabricated with coplanar access structure for RF characterization. Ni/Au (50/300 nm) was used for source and drain contacts and the GNR array was defined by e-beam lithography. To achieve accurate ribbon width control, hydrogen silsesquioxane (HSQ) was used as mask material. The excess of graphene surface was then etched by O2 RIE. After removing HSQ, the Al2O3 gate oxide was obtained by oxidation of a thin aluminium layer (about 2nm) in two steps leading to a final thickness of ∼ 5 nm. Finally, the top gate (Lg=150 nm) was realized using Ni/Au 50/300nm. The photograph of the final device is shown in Fig. 1.