D. Winkler

The limits of high-speed e-beam testing

Abstract The development of new types of very high-speed integrated circuits, such as those based on GaAs, makes extremely high demands on electron beam measuring technology. The limits of this measurement method for the time, voltage and spatial resolution were theoretically investigated. It is found that these parameters are mutually dependent on each other and that improvements in the time resolution can be made only at the expense of the voltage or spatial resolution. The theory allows specific optimization of the electron beam measuring devices inclusive of their electron-optical properties. An experimental system was realized for high speed measurements on GaAs devices. Electron pulse widths of 15 ps were experimentally attained with measuring probes of 0.5 μm diameter and an effective noise voltage of 30 mV. This device was used to investigate various components in the GHz range.

E-beam testing of high speed electronic devices

Abstract Electron beam testing techniques are successfully applied to failure analysis and time-resolved voltage measurements on conventional integrated circuits. These techniques, however, offer a time resolution of about 1 ns which does not meet the requirements of the high-speed devices presently being developed by the electronics industry. Our current work, which is discussed in this paper, aims at an improvement of time resolution along with a reduction of probe size to serve future needs. The theoretical limits of e-beam testing are discussed. Assuming realistic conditions for the performance of the electron optics, a system with 40 ps time resolution and 0.5 μm spatial resolution should theoretically allow a voltage resolution of 0.4 mV. So far, our experimental test system allows only 30 mV to be resolved under these conditions. The practical results already allow useful applications, but leave room for further improvements.

Investigations and measurements of the dynamic performance of high-speed ADCs

Investigations concerning the origin of the aperture jitter in a 4-b parallel analog-to-digital converter (ADC) implemented in a 0.5- mu m GaAs FET technology have been undertaken. On-chip electron-beam measurements of the comparator clock distribution show a deviation of 20 ps between the comparators. Simulation considering process variations shows similar results. To overcome these problems, a GaAs 5-b, 1-Gsamples ADC with on-chip track-and-hold circuitry (T&H) has been developed. A complete DC and AC characterization of the ADC using a histogram test, fast Fourier transform test, sine wave curve-fitting test and beat frequency test up to 1.3 GHz was performed. The measurement set-up consisted of a 4-GHz sine wave generator, a 10-GHz pulse generator, an 8-b wide 700-MHz digital acquisition system for data recording, and a PC. By using the T&H in front of the parallel ADC, 4.6 effective number of bits (ENOB) has been achieved at 1-GHz input signal compared to 3.7 ENOB without T&H. A comparison of the different test methods and results is given.<<ETX>>

Application of high-speed electron-beam testing in solid-state electronics

Abstract A high-speed electron-beam tester was developed to measure signals inside integrated high-frequency circuits, in particular those on a GaAs basis. This paper describes the current stage of development. Using electron beam pulses down to only 7 ps makes the tester capable of measurements at frequencies of approx. 60 GHz. Simultaneously a probe diameter of 0.5 μm and a noise voltage at the system output of 2 mV/√Hz are achieved at 2.2 keV acceleration voltage and 1 GHz pulse repetition rate. To meet practical demands a wafer prober was designed extending the application of the tester to on-wafer measurements. A GaAs 1k SRAM is used by way of example to demonstrate the possibilities for practical applications. Extending into the ps range, the high temporal resolution of the tester leads to a detailed comparison between calculated and measured signals. While allowing verifacation of the parameters used for simulation, this also yields useful hints on measures for redesigning the circuit.

Non-invasive waveform measurements of IC-internal GHz signals in A ps time scale

Abstract Electron beam testing has recently started to gain importance in GHz integrated-circuit characterization. It competes in this application with several other techniques. The advantages of the e-beam technique are: 1) its flexibility of device operation - pulses, logic signals or sine waves can be input to the device under test and may be changed in frequency between dc and several GHz, 2) its non-loading probe does not affect the function of the device under test, 3) its capability for probing lines below 1 μm. Currently an effective sampling-gate width of 8 ps is achieved, including the influence of pulse duration, timing jitter and transit time effect of secondary electrons. The system bandwidth is therefore approximately 80 GHz. Signal propagation delays of less than 3.5 ps can be resolved. The noise amplitude is 2 mV/√Hz at a 1GHz pulse repetition rate. This allows typical waveforms to be measured within several seconds.

Electron-beam testing of flat panel display substrates

Abstract A contactless electron-beam AM LCD-substrate test for in-process application has been developed, which includes a short-open test of control lines and pixels, and offers methods for a characterization of the active elements (including TFTs, MIMs and diodes). The technique uses e-beam input to the active elements by charging of pixel electrodes at a speed of more than 10 6 pixels (1 colour VGA plate) per minute. Detection of line defects, pixel shorts as well as variations in the active element performance are demonstrated. These test sequences do not require any external signals supplied to the matrix. In a real operation with control signals supplied e.g. to the shorting bars, internal matrix and driver signals can be probed for diagnostic purposes. These measurements are contactless and non-loading.

Specifications for sampling techniques in the time domain definition and measurement

Abstract Sampling-techniques are used by instruments such as sampling-oscilloscopes or electron-beam testers for measuring voltage waveforms [1,2]. In this paper definitions and measurement procedures are proposed to compare the temporal resolution of different methods and instruments [3,4,5] under practical conditions. The main aspects are phase-stability, rise-time resolution, and cut-off frequency. Whereas the limits for defining time intervals depend on the stability of the time base and phase control, both rise time resolution and cut-off frequency are additionally determined by the sampling gate width. Gate width, switching characteristics of the gate and the phase stability of the trigger control together will result in an effective width and shape of the sampling gate. The measured waveform of a signal is the result of the convolution of this effective sampling gate with the original waveform.

A GHz wafer prober for electron beam testing on a ps time scale

Abstract Electron-beam testing (‘e-beam’ testing) supports the development of new integrated circuits by allowing a comparison between measured and simulated internal waveforms. It avoids loading of the device under test, especially in the high frequency range of several GHz. The use of a wafer prober in combination with a high-speed e-beam test system extends the application to on-wafer measurements with a time resolution of some picoseconds. The demands made on this prober differ from those made on conventional test adapters since the prober is not used to detect signals but only to supply power and input signals to the device under test. Signals are measured exclusively by the e-beam. This offers an additional advantage since the input signals can be corrected by means of direct control by the e-beam. For example, signal losses or phase shifts due to the prober can be compensated for. While the high-frequency demands are reduced by this correction scheme, many other problems arising from the space limitations within the e-beam tester have to be solved. A new prober allows measurements in a frequency range extending to more than 10 GHz directly on the wafer without the need for cutting, mounting or bonding single chips.

The influence of the transit-time effect on propagation delay measurements by electron and photon beam techniques

Abstract Propagation delay measurements of high-speed digital devices require high accuracy and excellent stability. At the same time, long-range phase shifts are necessary because signals in these circuits may have very long periods. This can be achieved with a newly developed phase shift method, where a blanking capacitor acts as a gate to select one out of a larger number of pulses. A delay of several hundred nanoseconds with picosecond accuracy was demonstrated with this technique. Ultimately, the resolution of propagation delay measurements is limited by variations in the secondary electron transit time. This leads to a shift of the measured waveform, depending on the test point geometry. Errors then result if the propagation delay is measured between points of different dimensions. This effect was evaluated theoretically and experimentally. A difference in conductor width between two test points of a factor of 2 was found to lead to an error of 3ps for propagation delay measurements.

Signal analysis of a GaAs 1K-SRAM by high-speed e-beam testing

Abstract This paper reports on the internal signal analysis of a GaAs 1K-SRAM by means of a high-speed e-beam test system developed in our laboratories. It allows noninvasive measurements on signal lines within the circuit with a very high spatial resolution (spot diameter: 0.5 μm) and a delay time resolution better than 3.5 ps. With this technique, it is possible for the first time, to our knowledge, to directly measure internal high-frequency signals of a GaAs LSI circuit, thus obtaining information which is inaccessible by other measurement techniques and allowing an extensive circuit analysis. For example, a measured time budget for the memory could be obtained. Furthermore, the comparison between measured and simulated waveforms enables the designer to directly evaluate the accuracy of the transistor and signal-transmission line models. The waveform measurements on the bit lines during the read process and inside an address buffer of the memory were analysed.