Daigo Kikuta

Copper gate AlGaN/GaN HEMT with low gate leakage current

Copper (Cu) gate AlGaN/GaN high electron mobility transistors (HEMTs) with low gate leakage current were demonstrated. For comparison, nickel/gold (Ni/Au) gate devices were also fabricated with the same process conditions except the gate metals. Comparable extrinsic transconductance was obtained for the two kinds of devices. At gate voltage of -15 V, typical gate leakage currents are found to be as low as 3.5/spl times/10/sup -8/ A for a Cu-gate device with gate length of 2 /spl mu/m and width of 50 /spl mu/m, which is much lower than that of Ni/Au-gate device. No adhesion problem occurred during these experiments. Gate resistance of Cu-gate is found to be about 60% as that of NiAu. The Schottky barrier height of Cu on n-GaN is 0.18 eV higher than that of Ni/Au obtained from Schottky diode experiments. No Cu diffusion was found at the Cu and AlGaN interface by secondary ion mass spectrometry determination. These results indicate that copper is a promising candidate as gate metallization for high-performance power AlGaN/GaN HEMT.

Reliability Evaluation of Al2O3 Deposited by Ozone-Based Atomic Layer Deposition on Dry-Etched n-Type GaN

The time-to-breakdown (tBD) of Al2O3 deposited by ozone-based atomic layer deposition (ALD) on dry-etched n-type GaN was evaluated by constant-voltage-stress time-dependent dielectric breakdown (TDDB) measurements. The influence of dry etching was not observed in the TDDB and current–voltage (I–V) measurements at room temperature. The tBD of the ALD-Al2O3 film was estimated to be more than 40,000 years at 3 MV/cm and room temperature. However, the tBD estimated at 250 °C was around 102–103 s.

Schottky Barrier Height Determination by Capacitance-Voltage Measurement on n-GaN with Exponential Doping Profile

A capacitance–voltage (C–V) method was developed to extrapolate the Schottky barrier height on n-GaN with exponential carrier concentration profile. The carrier concentration profile of the unintentionally doped GaN was determined by C–V measurement to be exponential. On the basis of this profile, one-dimensional Poissons equation was calculated to obtain the relation between bias voltage and depletion width. Schottky barrier height was obtained by fitting the curves of 1/C2 and V with the experimental one, using the Schottky barrier height itself as a fitting parameter.

Metal/Al-doped ZnO ohmic contact for AlGaN/GaN high electron mobility transistor

Ohmic property for AlGaN/GaN high electron mobility transistor was investigated by insetting a highly Al-doped ZnO between the metal and AlGaN/GaN structure. The Al-doped ZnO was deposited by dc magnetron sputtering method and Ti/Al/Ni/Au was deposited on the ZnO by evaporation. Prior to the ZnO deposition, the surface of the samples was treated by O2 plasma, HCl and NH4OH, respectively. Good ohmic performance was obtained with contact resistance of 2.7 Ω mm even without annealing. The lowest contact resistance was 2.0 Ω mm after being annealed at 300 °C for the sample with HCl treatment before ZnO deposition.

Inductively Coupled Plasma Reactive Ion Etching with SiCl4 Gas for Recessed Gate AlGaN/GaN Heterostructure Field Effect Transistor

An extremely low and controllable etching rate of 1.25 nm/min for GaN is obtained with SiCl4 in inductively coupled plasma reactive ion etching. By atomic force microscope, the etched surface is observed to be as smooth as the as-grown surface. The etching technology is applied to the fabrication of recessed gate AlGaN/GaN heterostructure field effect transistors (HFETs). The HFETs showed good drain current–drain voltage characteristics with the values estimated from the AlGaN layer thickness decrease. In the positive-gate bias, the gate leakage current increases sharply with an n-value of 1.68, improved from 4.09 without etching. The negative bias current remains similar to that of the un-etched sample. Carrier drift mobility also remained approximately the same value of 1500 cm2 V-1 s-1. Thus, no HFET performance degradation caused by the etching is observed.

AlGaN/GaN High Electron Mobility Transistor with Thin Buffer Layers

An AlGaN/GaN high electron mobility transistor (HEMT) on a high-temperature-grown GaN buffer layer as thin as 0.35 µm has been demonstrated for the first time. The investigation of device characteristics is carried out using fat field-effect transistor (FATFET), ring-type FET and Hall measurements. The field-effect mobility obtained from the FATFET is about 1200 cm2/Vs, whereas the mobility in the buffer layers is around 200 cm2/Vs. A leakage current is found to be due to the non-semi-insulating underlying buffer layers. A two-layer model was adopted to separate the surface channel and buffer channel from Hall measurement data. The surface mobility enhancement can be attributed to the screening effect of ionized impurity and defects by the accumulated electrons.

Evaluation of Surface States of AlGaN/GaN HFET Using Open-Gated Structure

We analyzed passivation film and the AlGaN surface states using open-gated structures of AlGaN/GaN HFETs by numerical simulation and experiments. From the analyses, we confirmed that insulating film conductivity plays the prominent roles in device performances of the wide bandgap semiconductor device. Device simulation confirmed that the difference in I D -V G characteristics is due to the trapping type of the surface states; electron-trap type or hole-trap type. For electron-trap type surface states, the surface potential pinned at electron quasi-Fermi level, which is the same as the channel potential in the open-gated FETs. As a result, surface potential of ungated region is equal to the channel electric potential resulting in the uncontrollability of the channel current by the edge placed gate electrode. For hole-trap type surface states, the surface potential is pinned at hole quasi-Fermi level, which must be the same as the edge placed gate electrode potential. Then, the AlGaN surface potential varies with the electrode potential variation allowing the control of channel current as if the whole channel is covered with a metal electrode. Experiments for open-gated FET with unpassivated surface show no current variation. This corresponds to electron-trap type surface states from the simulation. On the other hand, SiO x evaporated open-gated FET show current control by the gate electrode. The I D -V G characteristics resembles in simulated I D -V G characteristics with hole-trap surface states. However, the estimated time constants for the trap reactions are incredibly long due to the deep energy level for the surface states in wide bandgap semiconductors. In addition, the open-gated FET showed reverse threshold shift to the value expected from the hole-trap pinning levels. So, we concluded that the no current variation for the unpassivated open-gated FET can be attributed to electron traps in the surface states, but the control of the drain current for SiO X deposited open-gated FET is not by surface hole-traps, but by slightly conductive passivation film is SiO X .

Bulk GaN growth by direct synthesis method

Abstract Bulk growth by direct synthesis method was carried out. Thick GaN films with smooth surfaces were obtained on metalorganic chemical vapor deposition (MOCVD) GaN films. Surface became worse when bare sapphire was used as a substrate. A buffer layer was introduced and a GaN film with the thickness of about 70 μ m was obtained on sapphire in 1-hour growth. The crystallinity of the grown layer on sapphire with buffer is comparable to that on a MOCVD film.

A Mechanism of Enhancement-Mode Operation of AlGaN/GaN MIS-HFET

A model for the enhancement-mode operation of an AlGaN/GaN metal-insulator-semiconductor heterostructure field-effect transistor (MIS-HFET) under DC and AC conditions is proposed. In DC operation at positive gate voltages, the MIS-HFET can be divided into a transistor area and a resistor area due to the diode nature of the insulator/AlGaN interface. The transistor area shrinks with the increases in gate voltage. The intrinsic-transistor gate-length reduction causes a drain current increase. The I-V characteristics based on the gradual channel approximation are derived. The I D hysteresis of the MIS-HFET is investigated by a circuit simulation using SPICE. We have confirmed that the hysteresis was caused by the phase difference between the potential variation of the gate insulator/AlGaN interface and that of the gate electrode due to CR components in the gate structure.

Gate Leakage Reduction Mechanism of AlGaN/GaN MIS-HFETs

The gate leakage reduction mechanism of AlGaN/GaN metal-insulator-semiconductor (MIS) heterostructure field-effect transistors (HFETs) is investigated and compared with those of three types of HFET, namely; a conventional HFET, a standard MIS-HFET and a specially prepared MIS-HFET with a metal interlayer. It is found that the resistance of the AlGaN layer with an insulator deposited on its surface is much higher than that of the AlGaN layer with a metal. From the fitting of transconductance-frequency characteristics, the resistance of the insulator-deposited AlGaN layer is about 5 orders of magnitude higher than that of the metal-deposited AlGaN layer. From dc measurements, the resistance of the insulator-deposited AlGaN layer at a negative gate bias is higher than that of the insulator layer. From these results, it can be concluded that gate leakage is suppressed by the high resistance of the AlGaN layer in the MIS-HFET at a negative gate bias.