Daisuke Kanemoto

Energy Harvesting Circuit on a One-Sided Directional Flexible Antenna

The present letter describes the design of an energy harvesting circuit on a one-sided directional flexible planar antenna. The circuit is composed of a flexible antenna with an impedance matching circuit, a resonant circuit, and a booster circuit for converting and boosting radio frequency power into a dc voltage. The proposed one-sided directional flexible antenna has a bottom floating metal layer that enables one-sided radiation and easy connection of the booster circuit to the metal layer. The simulated output dc voltage is 2.89 V for an input of 100 mV and a 50 Ω power source at 900 MHz, and power efficiency is 58.7% for 1.0 × 107 Ω load resistance.

A 5-GHz fully integrated CMOS class-E power amplifier using self-biasing technique with cascaded class-D drivers

This paper describes the design of 5-GHz fully integrated CMOS class-E single-ended power amplifier (PA) for wireless transmitter applications in a 0.18-μm CMOS technology. The proposed class-E PA employs the cascode topology with a self-biasing technique to reduce device stress. Three cascaded class-D driver amplifiers are used to actualize the sharp switching at the class-E power stage. All device components are integrated on chip and the chip area is 1.0×1.3 mm2. The measurement results indicate that the PA delivers 16.4 dBm output power and 35.4 % power-added efficiency with 2.3 V power supply voltage into a 50 Ω load.

Circularly Polarized One-Sided Directional Slot Antenna With Reflector Metal for 5.8-GHz DSRC Operations

This letter presents a new design for a circularly polarized one-sided directional slot antenna with reflector metal for 5.8-GHz dedicated short-range communications (DSRC) operations. Our proposed antenna was composed of a slot antenna, additional slots, a floating metal layer, and reflector metal. By optimizing the lengths and widths of the slots in the two orthogonal directions, circularly polarized radiation was generated. In order to improve the antenna gain, some slots were attached on the top metal layer, and a floating metal layer was attached to the bottom of the antenna. Moreover, an additional dielectric substrate and reflector metal layer were connected to the back of the antenna. The total antenna size including the reflector metal layer was 22.6 × 22.6 × 6.926 mm3. Our proposed antenna was fabricated on an FR4 substrate. The measured impedance bandwidth was 760 MHz from 5.82 to 6.58 GHz, and the measured circularly polarized gain was 4.59 dBic.

Development of one-sided directional printed slot antenna for high-band UWB systems

A novel design method of one-sided directional printed slot antenna for high-band ultra wide band (UWB) systems is proposed. For realize the one-sided directional radiation, we applied the floating metal layer on the bottom of the antenna substrate. By optimizing the lengths and widths of the antenna slot and substrate, three resonances can be obtained at different frequencies. By independently controlling three different resonances on the slot and antenna substrate, we can realize the wide band impedance matching. The final antenna size is 29 mm × 16 mm × 1.6mm. Our proposed antenna was fabricated on the FR4 substrate and measured impedance bandwidth is 2.58 GHz from 7.74 to 10.32 GHz. Moreover one-sided directional radiation can be obtained.

UWB circularly polarized planar antenna on flexible substrate

This paper presents the design of the circularly polarized slot antenna on the flexible substrate for ultra wide band (UWB) high band application. We applied two slots which are crossed perpendicularly to obtain circularly polarized wave. By optimizing the lengths and widths of the antenna slots and substrate, wide band impedance matching can be realized. Impedance bandwidth of proposed antenna is 5.60 GHz from 7.11 to 12.71 GHz and the antenna size is 16 mm × 16.3 mm × 0.254 mm.

Development of circularly polarized planar slot antenna for 5.8 GHz-DSRC application

A novel design method of circularly polarized planar slot antenna for 5.8 GHz Dedicated Short Range Communications (DSRC) applications is proposed. For realized circularly polarized wave, we use planar slot antenna. By optimizing the lengths and widths of antenna slot, resonances can be obtained at 5.8 GHz frequency. The antenna generates a circularly polarized wave providing a slot in the two orthogonal directions. Improving the gain by providing a slot in the same direction, arrayed structure is adopted. The final antenna size is 17 mm × 15 mm × 1.6 mm. Our antenna was fabricated on the FR4 substrate and impedance bandwidth is 310 MHz from 5.62 to 5.93 GHz. Moreover circularly polarized wave can be obtained.

Development of dual band miniaturized slot antenna with 2-stage bandpass filter

This paper presented the development of a miniaturized slot antenna, and its length is smaller than quarter wavelength, with a coplanar transmission line-based matching circuit on a printed circuit board. The matching circuit is realized by applying 2-stage band-pass filter (BPF). Moreover, we realized a dual band frequency characteristic in order to separate the uplink and downlink, which is suitable for a frequency division duplex (FDD) application. Our proposed dual band antenna is designed and simulated by using commercial three-dimensional electro magnetic (EM) field simulator. Also, we fabricated this dual band antenna on FR4 substrate and measured the frequency characteristics.

A 7.5mW 101dB SNR low-power high-performance audio delta-sigma modulator utilizing opamp sharing technique

A low power and high performance third order delta-sigma modulator for audio applications, fabricated in a 0.18/im CMOS process, is presented. The modulator utilizes a third order noise shaping with only one opamp by using opamp sharing technique. The opamp sharing among three integrator stages is achieved through the optimal operation timing, which makes use of the load capacitance differences between the three integrator stages. The designed modulator achieves 101.1dB signal-to-noise ratio (A-weighted) and 101.5dB dynamic range (A-weighted) with 7.5mW power consumption from a 3.3 V supply.

A third order delta-sigma modulator employing shared opamp technique for WCDMA on 0.18um CMOS

Analog to digital converter is a vital component in a wireless transceiver. High order loop filter is one of conventional approach to attain high resolution delta-sigma modulator which required one opamp for each integrator. A third orders delta-sigma modulator (DSM) has been designed utilizing shared opamp technique to reduce number of opamp required and decrease power consumption. Moreover, this architecture has relaxed comparator speed which is appropriate for wireless applications. First and second stages are sharing one opamp in integration and sampling phase. The proposed circuit has been designed on TSMC 0.18um CMOS technology. 2MHz Bandwidth, 50dB Peak SQNR, which is suitable for WCDMA, have been achieved.

Linearity enhancement technique for one bit A/D converter in wireless communication devices

In this paper, a novel one bit resolution ADC for wireless communication devices is presented. If we use a conventional one bit resolution ADC for wireless communication devices, the communication quality becomes worse due to heavy non-linearity. To overcome this problem, we proposed a novel one bit resolution ADC circuit with linearity enhancement technique, which uses a S/H and a hysteresis comparator. By using hysteresis effect, the periodicity of one bit resolution ADC output signal can be reduced. Signal-to-Quantization-Noise Ratio (SQNR) can be improved by 6.4dB, thanks to the proposed technique.