Dan Vasilache

Thermocompression bonding for 3D RF MEMS devices using gold and silver as intermediate layer

The paper presents preliminary results on Au-Au and Ag-Ag thermocompression bonding at low temperature. For both materials, sample structures have been prepared and different bonding conditions experimented. Results are compared in order to evaluate Au and Ag bond strength and to establish the optimum parameters. Shear tests were performed to quantify the bond strength and after that SEM was employed to examine the bonded joints. Bond strength of Ag-Ag compare to Au-Au (at 300°C and under the pressure of 0.196 MPa) seems more promising.

Study of the von Mises stress in RF MEMS switch anchors

In this paper an analysis of the von Mises stress in the RF MEMS switch structures is presented. This study was performed to analyze and optimize the stress in the anchors area for switch structures addressed to K and W frequency bands. Different types of anchors were taken into consideration and a comparison of von Mises stress has been performed. Optimization showed that it is possible to reduce stress up to more than 80% of its baseline, to the values much smaller than the breaking coefficient (100Mpa).

Fabrication of spiral phase plates for optical vortices

This work presents a reproductible fabrication process of spiral phase plates (SPPs) based on microfabrication techniques such as photolithography and reactive ion etching (RIE). The fabricated SPPs operate in the reflection mode in order to generate optical vortices with topological charge m = 2 and m = 4. Structural and functional characterizations prove the optical quality of the fabricated SPP.

Variable isotropy Deep RIE process for through wafer via holes manufacturing

This paper reports a method on the manufacturing of through wafer via holes in silicon with tapered walls by Deep Reactive Ion Etching (DRIE) using the opportunity to change the isotropy in the DRIE equipments during processing. By using consecutively anisotropic and isotropic etching steps it is possible to enlarge the dimension of via holes on one side of the wafer, while on the other side dimension is set by the initial etching window. The method was used for two etching windows sizes (100μm and 20μm respectively) on 200μm and 300μm thick wafers. The aim was to manufacture tapered walls via having a good control over the walls angle. Different Bosch process recipes providing different walls roughness were used. Via holes with tapered walls (2° to 22°) were manufactured using this method. An angle deviation smaller than 10% of the manufactured via holes along the wafers was observed.

V-shape through wafer via manufactured by drie variable isotropy process

A new process for through-wafer interconnects was studied by our group. This new process was developed to facilitate metallised through wafer via holes manufacturing. V-shape profile can contribute to an easier metallisation process and better adhesion. Manufacturing process use the possibility to change the isotropy in the Deep Reactive Ion Etching (DRIE) equipments from anisotropic to completely isotropic. Two slightly different processes were used in order optimize the technology and to see the changes introduced by isotropic/anisotropic processes sequence.

Cantilever for RF applications: Model and technology

A radio frequency (RF) microelectromechanical systems (MEMS) shunt cantilever is simulated using the Keysight Technologies Advanced Design System up to 65 GHz The electrical and RF performances of the fabricated switch are discussed. The RF simulation results are compared with the measurements for the up and down positions of the implemented MEMS switch.

Parametric reduced order models in static multiphysics analysis of MEMS switches

This contribution proposes a method to extract parametric reduced models that describe the coupled structural-electric behavior of RF MEMS switches. The equivalent capacitance coefficients and the effective elastic coefficients are extracted from coupled structural-electrostatic analysis. Parametric models are built based on the sensitivities of the extracted equivalent coefficients. The method is validated on two benchmarks: one for which experimental values are available, and the other one from the literature. The results show that, for the tested configurations, even a model of order 1 or 2 can catch accurately enough (e.g. relative error of less than 5 %) the pull-in voltage of the full order model, for a variation of the investigated parameter of less than 20 %. Such a reduced parametric model is useful in early stages of the design.

Wafer resistivity influence over DRIE processes for TSVs manufacturing

This paper presents for the first time influence of the silicon resistivity over the DRIE processes. Our aim was to develop a new process for tapered walls through silicon vias (TSVs) with a good control over the walls angle. Different wafer types were used and a dependency of resistivity was found, with an important impact over the TSVs shape. Solution found is presented and experiments performed to obtained designed TSVs.

Fabrication of through-wafer interconnections by gold electroplating

A new method for conductive vias using gold electroplating is presented. Tapered walls through wafer via (TWV) holes were made using a variable isotropy DRIE process, with a very good control over the obtained angles — angles of 11.3° and 21.8° were obtained with errors smaller than 10%. Barrier and seed layers were deposited in vias performed by PVD (Physical Vapor Deposition) techniques with a very good coverage of the walls. Finally, gold electroplating was used to fill the narrow part of vias.

Study of an electro-mechanic mechanism exploiting in-plane rotation for the realization of tuneable capacitors

In the last years MEMS Switches and related MEM components have encountered a great interest in the technology community for their outstanding intrinsic characteristics. MEMS Switches in particular offer low insertion loss, higher isolation, almost zero power consumption, small size and weight at very low intermodulation distortion, which makes them suitable for many applications. The MEMS technology has demonstrated also to be able to provide potentially high quality components for other passive RF and microwave devices such as capacitors and inductors. In this paper we extend our research activities on MEM technology to the design of tuneable capacitors based with in-plane movement.