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Dive into the research topics where Daniel Rhee Min Woo is active.

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Featured researches published by Daniel Rhee Min Woo.


electronics packaging technology conference | 2014

High power SiC inverter module packaging solutions for junction temperature over 220°C

Daniel Rhee Min Woo; Hwang How Yuan; Jerry Aw Jie Li; Ho Siow Ling; Lee Jong Bum; Zhang Songbai

The SiC based high power 3 phase inverter module with double side cooling structure was developed. By applying flipchip bonding of SiC based high power DMOSFET device on DBC substrate, the source and gate bonding could be achieved. The drain interconnection was done by copper clip attach. The developed structure can provide the flat structure for both top and bottom surfaces, which can be effectively utilized for double side cooling design for high power heat dissipation. In addition to power module design with double side cooling capability, the high temperature endurable material set which can endure over 220°C device junction temperature such as high temperature interconnection, encapsulation and TIM (thermal interface materials) are developed and identified. Through the thermal, mechanical, electrical modeling & characterization and the reliability test for the developed functional test vehicles, the author could demonstrate the possibility of flip-chip based double side cooling capable high power module structure which can be utilized to high power and high temperature endurable applications for future wide band-gap device such as SiC and GaN based inverter modules.


electronics packaging technology conference | 2014

Extremely high temperature and high pressure (x-HTHP) endurable SOI device & sensor packaging for deep sea, oil and gas applications

Daniel Rhee Min Woo; Jason Au Keng Yun; Yu Jun; Eva Wai Leong Ching; F. X. Che

The extremely high temperature and high pressure endurable (250°C/30 kspi) SOI based temperature sensor and voltage regulator module was developed for harsh environment application such as deep sea, oil & gas down-hole drilling and aerospace engine electronics. The hermetically sealed metal casing which can withstand external pressure up to 30 kpsi was designed and optimized through mechanical modeling and characterization. In side of this hermetic casing, the physical layout of SOI devices and ruggedized components for temperature sensor and voltage regulator was fabricated on ceramic substrate assembled by high temperature endurable interconnection materials such as Au-Sn, Au-Ge and Ag sintering materials. The developed modules are tested with specified reliability testing criteria and evaluation results shows that the packaging and interconnection showed still functional after high temperature storage (HTS) test of 250°C for 500 h and temperature cycling condition -55°C~250°C for 500 cycles. Also passed 30 kpsi pressure cycling and other deep sea and down hole drilling environment test. Those results demonstrate that current SOI sensor module with hermetically sealed metal casing packages design, material and process are considered to be applicable for extreme-HTHP application meeting huge demands in automotive, aerospace engine electronics, down-hole drilling, geothermal and deep sea applications for future.


electronic components and technology conference | 2016

Miniaturized Double Side Cooling Packaging for High Power 3 Phase SiC Inverter Module with Junction Temperature over 220°C

Daniel Rhee Min Woo; Hwang How Yuan; Jerry Aw Jie Li; Lee Jong Bum; Zhang Hengyun

In this paper, authors developed miniaturizeddouble side cooling packaging for SiC (silicon carbide) highpower inverter module using new material solutions towithstand high temperature condition over 220oC. Instead ofconventional thick wire bonding on the device, the flip chipbonding for high power source and gate interconnections aredeveloped. For the drain interconnection, copper clips areattached using high temperature endurable interconnectionmaterials. By utilizing these flip-chip structures, the powermodule with double side cooling design was enabled effectivelyfor the heat dissipation induced by high power switchingoperation. Through the thermal modeling and characterization, the power modules package thermal dissipation performancewas found to be enhanced by 2 times compared with theconventional single side cooling type power module. To copewith the increased maximum junction temperature limit tooperate wide band gap power devices the novel packagingmaterial and its process which can endure up to 220 °C weredeveloped also. Bi and Ag based high temperature solder wasapplied for the flip-chip bumping for SiC device on the DBC(direct bonded copper). The copper clip was applied on thedevice backside as drain interconnection to DBC also. Hightemperature endurable EMC (epoxy molding compound) andTIM (thermal interface material) were also evaluated. Thepackaging process was optimized and developed along with themodeling. Through the reliability assessment, we could showthe potential applicability of double side cooling power modulewith flip-chip and clip bonding design and it would be usefulfor the SiC and GaN based high power module and highjunction and environmental temperature endurableapplications for the near future.


electronics packaging technology conference | 2014

Process development of multi-die stacking using 20 um pitch micro bumps on large scale dies

Lee Jong Bum; Jerry Aw Jie Li; Daniel Rhee Min Woo

In the 3D integration, multiple chip stacking structure requires large numbers of interconnections inside of each chip. 3D integration, however, encounters several fundamental technology challenges which are Cu TSV expansion, transistor degradation or open failures on Cu contamination, micro-bump stress, and so on. The reliability issues on TSV and micro-bumps are very critical at the stacked chip package as well as during the wafer level processes. Micro-bumps used in this study have 10 μm diameters on TSVs and are placed with 20 μm pitch. The diameter of TSV which used in the study is 5μm. Total 122,054 bumps on each chip which was thinned down to 50 μm are fabricated and stacked for 6 die stacking. Measured electrical resistance was well matched with calculated electrical resistance.


electronics packaging technology conference | 2012

High-temperature endurable encapsulation material

Vivek Chidambaram; Ho Beng Yeung; Chan Yuen Sing; Daniel Rhee Min Woo

The accomplishment of fully functional high-pressure high-temperature (HPHT) well is possible only, when the packaging and interconnections in the well logging equipments can survive at higher temperatures. Currently, there are numerous choices for substrate materials and interconnection materials. However, there are hardly any encapsulation materials that can endure at 300°C. Thus, the limiting factor for the evaluation and monitoring of HPHT wells is; the availability of high-temperature endurable encapsulation material. In this paper, the endurability of three prospective candidates for high-temperature encapsulation have been characterized and reported. The three prospective candidates are benzocyclobutene (BCB), ceramic filled cyanate ester and quartz filled cyanate ester. The high-temperature endurability has been evaluated in this work by high-temperature storage at 300°C up to 500 hours. Adhesion strength of these prospective candidates with the alumina ceramic substrate and the Si die was verified by room shear testing and hot shear testing. It has been determined that the quartz filled cyanate ester could comply with the minimum indispensable requirement for this application, when sandwiched between alumina ceramic substrates, despite the loss of strength during long-term thermal aging at 300°C. The material degradation has been studied in this work, using thermo-gravimetric analysis.


electronics packaging technology conference | 2014

Development of ruggedized timer and temperature sensor packaging for 300°C/30kpsi downhole environment

Hwang How Yuan; Haridas Kuruveettil; Eva Wai Leong Ching; Eric Phua Jian Rong; Gan Chee Lip; Daniel Rhee Min Woo

While the advantages of high temperature electronics in the form of hermetic ceramic packaging are numerous, their deployments are being limited by the maximum environmental pressure. Literature [1] has shown that to withstand 30kpsi pressure for instance, a flat ceramic lid of at least 3mm will be required for a cavity size of 10.16mm × 10.16mm. Lid thickness will have to increase if the cavity size is increased. However, by filling the cavity with high temperature endurable material, thickness requirement can be eliminated from consideration, maintaining low package profile [2]. The approach has been demonstrated through a timer / temperature sensor circuitry embedded in a 31.75mm × 10.92mm cavity and successfully passed a combined HPHT of 30kpsi and 300°C until the end of targeted 200 hours.


electronics packaging technology conference | 2014

Gold-germanium laser jetting for high temperature (300°C) flip chip application

Hwang How Yuan; Ding Mian Zhi; Daniel Rhee Min Woo

For downhole drilling applications, packages will have to endure extremely harsh conditions, which can easily reach a temperature of 300°C. At such high temperatures, the commonly adopted solder materials are lead-based as they are more readily available in paste and solder ball forms. While multiple studies have been performed on eutectic gold-germanium solder and its reliability at high temperature, little work has been done on the processing and assembly of the material into a flip chip package. This paper aims to study the feasibility of gold-germanium solder assembly through laser jetting process optimization. It is observed that Ge phase coarsening does not occur with laser jetting, compare to reflow process.


electronics packaging technology conference | 2013

Extreme high pressure and high temperature package development

Hwang How Yuan; Eva Wai Leong Ching; Chan Yuen Sing; Vivek Chidambaram; Lee Jong Bum; Eric Phua Jian Rong; Gan Chee Lip; Daniel Rhee Min Woo

As oil and gas industries ventured further and deeper into the earth or ocean in search for new reservoirs, the requirements of depth, pressure and temperature are ever expanding. Conventionally, ceramic based hermetic sealed packaging is used for high temperature endurable package. However, for the case of highly pressurized application, the stress on the package is substantial and the hermetically sealed ceramic package cannot survive under a high pressure up to 30kpsi. To overcome this limitation, the authors are proposing to fill high temperature and high pressure endurable protective materials inside of ceramic substrate cavity to absorb the package internal stress caused by the external high pressure loading. The reliability of the package has been successfully demonstrated under combined 30kpsi isostatic pressure and 300°C temperature (HPHT) aging condition for 500 hours as well as thermal cycling condition for 500 cycles.


electronics packaging technology conference | 2015

Development of SiC power module using 70μm single metal layer substrates

Hwang How Yuan; Norhanani Binte Jaafar; Sorono Dexter Velez; Lee Jong Bum; Yeap Yean Wei; Daniel Rhee Min Woo

While leadframe has come a long way as a cost effective substrate, there is still limitation over its design rule. In this article, the authors have developed and put to test a SiC based PQFN using 70μm single metal layer substrates, allowing further miniaturization and complex design of PQFN. New high temperature EMC with a Tg of 241°C and lead free bismuth silver solder are adopted. Reliability tests and RDS,on results showed that the materials adopted in the development does not degrade the MOSFETs functionality and all samples passed reliability and power cycling tests.


electronics packaging technology conference | 2014

Process development and optimization for high temperature endurable flip chip interconnection in SiC high power module

Jie Li Aw; Bu Lin; Hwang How Yuan; Daniel Rhee Min Woo

Integrated Circuited devices fabricated on SiC instead of Si allows higher operating temperatures for the future automotive, aerospace, and green and renewable energy industry. With higher temperature interfaces and contacts between the chip and package, new packaging interconnection materials able to sustain high temperature operations need to be explored. This work demonstrates the assembly of a dual-side cooled high power 3-phase inverter module that was 32mm × 30mm with 6 SiC DMOSFET attached by flip chip technology. Rheological modeling using FVM (Finite Volume Method) based simulation was carried out and validated for the dispense pattern of silver sintering material used in high power electronics flip chip attach. Further details of assembly process flow, assembly challenges, reliability assessment and future works will be discussed in the full manuscript.

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Gan Chee Lip

Nanyang Technological University

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Eric Phua Jian Rong

Nanyang Technological University

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