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Dive into the research topics where Hwang How Yuan is active.

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Featured researches published by Hwang How Yuan.


electronics packaging technology conference | 2014

High power SiC inverter module packaging solutions for junction temperature over 220°C

Daniel Rhee Min Woo; Hwang How Yuan; Jerry Aw Jie Li; Ho Siow Ling; Lee Jong Bum; Zhang Songbai

The SiC based high power 3 phase inverter module with double side cooling structure was developed. By applying flipchip bonding of SiC based high power DMOSFET device on DBC substrate, the source and gate bonding could be achieved. The drain interconnection was done by copper clip attach. The developed structure can provide the flat structure for both top and bottom surfaces, which can be effectively utilized for double side cooling design for high power heat dissipation. In addition to power module design with double side cooling capability, the high temperature endurable material set which can endure over 220°C device junction temperature such as high temperature interconnection, encapsulation and TIM (thermal interface materials) are developed and identified. Through the thermal, mechanical, electrical modeling & characterization and the reliability test for the developed functional test vehicles, the author could demonstrate the possibility of flip-chip based double side cooling capable high power module structure which can be utilized to high power and high temperature endurable applications for future wide band-gap device such as SiC and GaN based inverter modules.


electronic components and technology conference | 2016

Miniaturized Double Side Cooling Packaging for High Power 3 Phase SiC Inverter Module with Junction Temperature over 220°C

Daniel Rhee Min Woo; Hwang How Yuan; Jerry Aw Jie Li; Lee Jong Bum; Zhang Hengyun

In this paper, authors developed miniaturizeddouble side cooling packaging for SiC (silicon carbide) highpower inverter module using new material solutions towithstand high temperature condition over 220oC. Instead ofconventional thick wire bonding on the device, the flip chipbonding for high power source and gate interconnections aredeveloped. For the drain interconnection, copper clips areattached using high temperature endurable interconnectionmaterials. By utilizing these flip-chip structures, the powermodule with double side cooling design was enabled effectivelyfor the heat dissipation induced by high power switchingoperation. Through the thermal modeling and characterization, the power modules package thermal dissipation performancewas found to be enhanced by 2 times compared with theconventional single side cooling type power module. To copewith the increased maximum junction temperature limit tooperate wide band gap power devices the novel packagingmaterial and its process which can endure up to 220 °C weredeveloped also. Bi and Ag based high temperature solder wasapplied for the flip-chip bumping for SiC device on the DBC(direct bonded copper). The copper clip was applied on thedevice backside as drain interconnection to DBC also. Hightemperature endurable EMC (epoxy molding compound) andTIM (thermal interface material) were also evaluated. Thepackaging process was optimized and developed along with themodeling. Through the reliability assessment, we could showthe potential applicability of double side cooling power modulewith flip-chip and clip bonding design and it would be usefulfor the SiC and GaN based high power module and highjunction and environmental temperature endurableapplications for the near future.


electronics packaging technology conference | 2014

Development of ruggedized timer and temperature sensor packaging for 300°C/30kpsi downhole environment

Hwang How Yuan; Haridas Kuruveettil; Eva Wai Leong Ching; Eric Phua Jian Rong; Gan Chee Lip; Daniel Rhee Min Woo

While the advantages of high temperature electronics in the form of hermetic ceramic packaging are numerous, their deployments are being limited by the maximum environmental pressure. Literature [1] has shown that to withstand 30kpsi pressure for instance, a flat ceramic lid of at least 3mm will be required for a cavity size of 10.16mm × 10.16mm. Lid thickness will have to increase if the cavity size is increased. However, by filling the cavity with high temperature endurable material, thickness requirement can be eliminated from consideration, maintaining low package profile [2]. The approach has been demonstrated through a timer / temperature sensor circuitry embedded in a 31.75mm × 10.92mm cavity and successfully passed a combined HPHT of 30kpsi and 300°C until the end of targeted 200 hours.


electronics packaging technology conference | 2014

Gold-germanium laser jetting for high temperature (300°C) flip chip application

Hwang How Yuan; Ding Mian Zhi; Daniel Rhee Min Woo

For downhole drilling applications, packages will have to endure extremely harsh conditions, which can easily reach a temperature of 300°C. At such high temperatures, the commonly adopted solder materials are lead-based as they are more readily available in paste and solder ball forms. While multiple studies have been performed on eutectic gold-germanium solder and its reliability at high temperature, little work has been done on the processing and assembly of the material into a flip chip package. This paper aims to study the feasibility of gold-germanium solder assembly through laser jetting process optimization. It is observed that Ge phase coarsening does not occur with laser jetting, compare to reflow process.


electronics packaging technology conference | 2013

Extreme high pressure and high temperature package development

Hwang How Yuan; Eva Wai Leong Ching; Chan Yuen Sing; Vivek Chidambaram; Lee Jong Bum; Eric Phua Jian Rong; Gan Chee Lip; Daniel Rhee Min Woo

As oil and gas industries ventured further and deeper into the earth or ocean in search for new reservoirs, the requirements of depth, pressure and temperature are ever expanding. Conventionally, ceramic based hermetic sealed packaging is used for high temperature endurable package. However, for the case of highly pressurized application, the stress on the package is substantial and the hermetically sealed ceramic package cannot survive under a high pressure up to 30kpsi. To overcome this limitation, the authors are proposing to fill high temperature and high pressure endurable protective materials inside of ceramic substrate cavity to absorb the package internal stress caused by the external high pressure loading. The reliability of the package has been successfully demonstrated under combined 30kpsi isostatic pressure and 300°C temperature (HPHT) aging condition for 500 hours as well as thermal cycling condition for 500 cycles.


electronics packaging technology conference | 2015

Development of SiC power module using 70μm single metal layer substrates

Hwang How Yuan; Norhanani Binte Jaafar; Sorono Dexter Velez; Lee Jong Bum; Yeap Yean Wei; Daniel Rhee Min Woo

While leadframe has come a long way as a cost effective substrate, there is still limitation over its design rule. In this article, the authors have developed and put to test a SiC based PQFN using 70μm single metal layer substrates, allowing further miniaturization and complex design of PQFN. New high temperature EMC with a Tg of 241°C and lead free bismuth silver solder are adopted. Reliability tests and RDS,on results showed that the materials adopted in the development does not degrade the MOSFETs functionality and all samples passed reliability and power cycling tests.


electronics packaging technology conference | 2015

Miniaturization of bio-fluidic package for point-of-care diagnostic

Hwang How Yuan; Lee Tae Yoon; Ding Mian Zhi; Chung Jaehoon; Daniel Rhee MinWoo

This paper introduces a new packaging concept that allows miniaturization of bio-fluidic package for micro and nanoparticle separation through dielectrophoresis (DEP). Leaf-shaped spacers were patterned at wafer level using a developmental bio-compatible photoresist through lithography processes, allowing better control of spacer profile and thickness. Interconnects were formed on ITO-coated glass and then flip-chip bonded onto the patterned die. The developed test vehicle, measured 5mm × 5mm, has 9216 electrodes arranged within a total sensor area of 3 mm × 3 mm. Experiments using colloids showed that the test vehicle is able to trap the 15μm suspended beads onto the electrodes.


electronics packaging technology conference | 2015

Interfacial reaction and reliability of high temperature die attach solders for power electronics

Lee Jong Bum; Hwang How Yuan; Pan Wei Chih; Rhee Min Woo Daniel

Lead-free solder alloys for high temperature applications is required to meet increasing demands for reliable replacements for lead-based alloys. Especially, high temperature solder is required for bonding in power electronics packages where first bonding on a lead-frame is performed at a temperature of about 330 °C. In this study, the SiC based TO-220 power package was developed by applying high temperature endurable material sets which can endure over 220°C device junction temperature. The interfacial reaction and reliability of SiC die attachment on and Ni plated lead frames using Zn-Al based solder was investigated. Zn-Al-Ge solder alloy showed good temperature tolerance after temperature cycle (TC), high temperature storage test whereas Zn-Al-Ge-Mg solder alloy showed failures after TC test.


electronics packaging technology conference | 2014

High temperature die attach material on ENEPIG surface for high temperature (250DegC/500hour) and temperature cycle (−65 to +150DegC) applications

Leong Ching Wai; Seit Wen Wei; Hwang How Yuan; Daniel Rhee MinWoo

There are five types of die attach materials with high melting point (>250°C) are evaluated in this study, these materials are high lead (Pb95.5Sn2Ag2.5) solder paste, Gold Tin (Au80Sn20) solder paste, pressure-less Silver (Ag) sintered paste, pressure type silver (P-Ag) sintered paste and Gold Germanium (Au88Ge12) perform solder. The reliability tests included high temperature storage (HTS) at 250°C/500hours with N2 purge and temperature cycling for 500cycles at -65°C to 150°C. Majorities of the test vehicles have good shear mode (Silicon die crack) after reliability tests. Only mix modes failure on the pressure-less Ag sintered die attach materials is observed at HTS 250°C, after 500hours with shear strength of 17.9Mpa. It is crucial to understand the conditions of the interfaces between these high temperature die attach materials to the devices and substrate after reliability tests. The cross sections samples are further studied on the interface between the die attach material and substrate (ENEPIG surface) with SEM and EDX analysis. It is interesting to found out that the pressure type Ag sintered has denser bulk materials compare to pressure type Ag sintered materials, and this provides an excellent heat transfer and low electrical resistance at the interface. After HTS for 500hours, the Sn rich phase of AuSn solder has the tendency to form at the ENEPIG site. High lead solder form a layer of Ni/Pb/Sn at the ENEPIG surface and where AuGe solder form a layer of Ni/Ge at the interface to ENEPIG substrate. A details study on the materials interface to the die and ENEPIG substrate surface are carried out; and out of these high temperature die attach materials, which will be more preferable in term of process ability and price is discussed.


electronics packaging technology conference | 2014

Process development and optimization for high temperature endurable flip chip interconnection in SiC high power module

Jie Li Aw; Bu Lin; Hwang How Yuan; Daniel Rhee Min Woo

Integrated Circuited devices fabricated on SiC instead of Si allows higher operating temperatures for the future automotive, aerospace, and green and renewable energy industry. With higher temperature interfaces and contacts between the chip and package, new packaging interconnection materials able to sustain high temperature operations need to be explored. This work demonstrates the assembly of a dual-side cooled high power 3-phase inverter module that was 32mm × 30mm with 6 SiC DMOSFET attached by flip chip technology. Rheological modeling using FVM (Finite Volume Method) based simulation was carried out and validated for the dispense pattern of silver sintering material used in high power electronics flip chip attach. Further details of assembly process flow, assembly challenges, reliability assessment and future works will be discussed in the full manuscript.

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Eric Phua Jian Rong

Nanyang Technological University

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Gan Chee Lip

Nanyang Technological University

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