Daniele Sirtori

PERFORMANCE EVALUATION AND DYNAMIC ANALYSIS OF MEMS ACCELEROMETERS FOR HIGH PRECISION POINTING DEVICES

Abstract Providing an accurate position estimate is a challenging problem that has to be faced in different fields. Several solutions have been proposed to harness this challenging issue. In this paper, we analyze the dynamic performance of a MEMS accelerometer tailored to precision pointing devices applications. The prototype consists of a testing board equipped with a single MEMS accelerometer and a microprocessor mounted within a PC-mouse. An embedded application takes care of position estimation and data transmission. Two main problems will be addressed, namely the influence of the attitude angle and of irregularities in the working surface on the position reconstruction from measured data. The overall analysis process is performed on experimental data. To assess the position reconstruction performance we employed a motion capture system for measuring the true device position.

Architectural Design Space Exploration Achieved through Innovative RTL Power Estimation Techniques

Todays design community need tools that address early power estimation, making it possible to find the optimal design trade-offs without respinning to explore the whole chip. Several approaches based on a fast (coarse) logic synthesis step, in order to analyze power on the mapped gate-level netlist and then create suitable power models have been published in the last years. In this paper we present some applications of RTPow, a proprietary tool dealing with the RT-level power estimation. The innovative estimation engine that does not perform any type of on-the-fly logic synthesis, but analyze the HDL description from the functionality point of view, permits a drastic time saving. Besides this top-down estimation, RTPow is able to perform a series of power macromodels and the bottom-up approach that enable an effective power budgeting. The first is an Adaptive Gaussian Noise Filter (28K Eq.Gate), described in VHDL, the second is a Motion Estimation and Compensation Device for Video Field Rate Doubling Application (171K Eq.Gate) also described in VHDL. The third is a micro-processor core (111K Eq.Gate) described using Verilog language.