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Dive into the research topics where Daniele Vimercati is active.

Publication


Featured researches published by Daniele Vimercati.


IEEE Journal of Solid-state Circuits | 2008

A 65 nm 1 Gb 2b/cell NOR Flash With 2.25 MB/s Program Throughput and 400 MB/s DDR Interface

Corrado Villa; Daniele Vimercati; Stefan Schippers; Salvatore Polizzi; Andrea Scavuzzo; Maurizio Francesco Perroni; Maurizio Gaibotti; Mauro Sali

This paper describes a 1.8 V, 1 Gb 2 b/cell NOR flash memory, based on time-domain voltage-ramp reading concept and designed in a 65 nm technology. Program method, architecture and algorithm to reach 2.25 MB/s programming throughput are also presented, as well as the read concept, allowing 70 ns random access time and a 400 MB/s sustained read throughput via a DDR interface.


international solid-state circuits conference | 2007

A 65nm 1Gb 2b/Cell NOR Flash with 2.25MB/s Program Throughput and 400MB/s DDR interface

Corrado Villa; Daniele Vimercati; Stefan Schippers; Salvatore Polizzi; Andrea Scavuzzo; Maurizio Francesco Perroni; Maurizio Gaibotti; Mauro Sali

This paper describes a 1.8 V, 1 Gb 2 b/cell NOR flash memory, based on time-domain voltage-ramp reading concept and designed in a 65 nm technology. Program method, architecture and algorithm to reach 2.25 MB/s programming throughput are also presented, as well as the read concept, allowing 70 ns random access time and a 400 MB/s sustained read throughput via a DDR interface.


Archive | 2006

Memory device with a ramp-like voltage biasing structure and reduced number of reference cells

Daniele Vimercati; Efrem Bolandrina


Archive | 2004

Method for reading a nonvolatile memory device and nonvolatile memory device implementing the reading method

Daniele Vimercati


Archive | 2003

Method for reading a nonvolatile memory device and corresponding device

Daniele Vimercati


Archive | 2004

Full-swing wordline driving circuit

Daniele Vimercati; Stefan Schippers; Graziano Mirichigni; Corrado Villa


Archive | 2006

Memory device with time-shifting based emulation of reference cells

Federico Pio; Efrem Bolandrina; Daniele Vimercati


Archive | 2003

Improved sensing circuit for a semiconductor memory including bit line precharging and discharging functions

Efrem Bolandrina; Sara Fiorina; Marco Onorato; Stefan Schippers; Daniele Vimercati


Archive | 2006

Ramp generator and relative row decoder for flash memory device

Daniele Vimercati; Marco Onorato; Carmela Albano; Mounia El-moutaouakil


Archive | 2005

Charge-pump device with increased current output

Carmela Albano; Daniele Vimercati

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