Darioush Agahi
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Featured researches published by Darioush Agahi.
international solid-state circuits conference | 2009
Tirdad Sowlati; B. Agarwal; Joshua Haeseok Cho; Thomas Obkircher; Mohamed El Said; John Vasa; Masoud Kahrizi; Elias Dagher; Wei-Hong Chen; Martin Vadkerti; Georgi Taskov; Utku Seckin; Hamid R. Amir Firouzkouhi; Behzad Saeidi; Hasan Akyol; Yunyoung Choi; Amir Mahjoob; Sandeep D'Souza; Chieh-Yu Hsieh; David Guss; Dan Shum; Dean A. Badillo; Imtiyaz Ron; Doris Ching; Feng Shi; Yong He; Jaleh Komaili; Aravind Loke; R. Pullela; Engin Pehlivanoglu
There has been an increased demand for 3G cell phones that support multiple bands of operation and are backward compatible with the 2G/2.5G standard to provide coverage where 3G networks have not yet been fully deployed. The transceiver design for such a handset becomes complicated with the need for separate transceivers for 3G and 2G/2.5G [1,2] or for multiple inter-stage receive / transmit SAW filters [3]. A single-chip transceiver that operates as a multimode multiband radio and eliminates the inter-stage receive / transmit SAW filters is presented. Figure 6.3.1 shows the block diagram of the transceiver with 7 primary and 4 diversity bands in WCDMA, and quad band in GSM. The transceiver is designed to operate in any of the UTRA bands 1 to 10, with the exception of band 7. It supports HSDPA (Cat 1–12), HSUPA (Cat 1–6), EGPRS (Classes 1–12, 30–39), and compressed mode of EGPRS / WCDMA operation. The transceiver is compliant with 3G DigRF interface 3.09.
international solid-state circuits conference | 2009
R. Pullela; Shahrzad Tadjpour; Dmitriy Rozenblit; William J. Domino; Thomas Obkircher; Mohamed El Said; Tirdad Sowlati; Darioush Agahi; Wei-Hong Chen; Dean A. Badillo; Masoud Kahrizi; Jaleh Komaili; Stephane Richard Marie Wloczysiak; Utku Seckin; Yunyoung Choi; Hasan Akyol; Martin Vadkerti; Amir Mahjoob; Hamid R. Amir Firouzkouhi; Dan Shum; Rajendra Suhanthan; Nooshin D. Vakilian; Tom Valencia; Christophe Dantec; Aaron Paff; Mona Ahooie
This paper describes a 2.5G cellular transceiver with standard DigRF interface, implemented in a low-cost 0.13µm CMOS process. This is the first CMOS single-chip, polar closed-loop transmitter, excluding the power amplifier (PA). This transmitter achieves an efficiency of 26% in EDGE mode by linearizing a saturated PA in a closed-loop feedback system. This is much higher than the typical 15-to-18% efficiency of systems using a linear PA [1]. Typical high-band/ low-band performance of −62/−64dBc in 30kHz for 400kHz offset spectral mask and 1.4/1.7% EVM in EDGE mode are significantly better than those reported earlier [1–3]. Using a low-noise quadrature mixer topology, the receiver, including T/R switch and SAW filters, achieves a sensitivity of −110dBm. The RF solution, consisting of PAs in a multi-chip integrated antenna switch module, SAW filters with integrated matching components and the transceiver, shown in Fig. 6.1.1, is the smallest form factor available in the market today.
radio and wireless symposium | 2008
Masoud Kahrizi; Jaleh Komaili; John E. Vasa; Darioush Agahi
In this paper, a digital technique for canceling second-order inter-modulation (IM2) of transmitter (TX) leakage in WCDMA direct-conversion receivers is described. Digital TX signal is used as a reference to generate a digital IM2 signal and then is passed through the auxiliary digital filter chain as in receiver chain. Adaptive least mean square (LMS) algorithm combined with a delay estimator provides a very robust technique to act as a matched filter to estimate the channel which causes leakage from TX to RX. The delay between the receive path and the reference path is estimated by peak correlation detection. This IM2 cancellation works well even though the actual IM2 components are far below the desired signal and thermal noise.
International Journal of Microwave and Wireless Technologies | 2009
Gye-An Lee; Darioush Agahi; Franco De Flaviis
Performance comparison is made between on-chip spiral inductor in flip-chip versus wirebond package technology. Full-wave electromagnetic simulation and on-strip measurement techniques were used to study the performance fluctuations of inductor within flip-chip environment. Results show that the performance of a flipped silicon-based spiral inductor is affected by the radio frequency (RF) current return path differences. The RF current return path for flip-chip is concentrated on the surface of silicon layer exclusively because back side ground under silicon is floating in flip-chip technology. In addition, the bump proximity effect is also considered. On-chip inductors in flip-chip environment must be optimized by reducing the eddy current in the silicon substrate and parasitic affects by adjusting design parameters. The equivalent circuit model of the flipped on-chip spiral inductor is verified with measured results over broadband frequencies. Also, the RF flip-chip characterization technique using on-strip measurement method is presented.
Archive | 2006
Dmitriy Rozenblit; Tirdad Sowlati; Morten Damgaard; Darioush Agahi
Archive | 2002
Dmitriy Rozenblit; William J. Domino; Darioush Agahi
Archive | 2006
Norman J. Beamish; Darioush Agahi
Archive | 2008
Darioush Agahi; Arumugam Govindswamy
Archive | 2007
Dmitriy Rozenblit; Tirdad Sowlati; Darioush Agahi
Archive | 2007
Dmitriy Rozenblit; Tirdad Sowlati; Darioush Agahi; Morten Damgaard