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Dive into the research topics where Tirdad Sowlati is active.

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Featured researches published by Tirdad Sowlati.


international symposium on low power electronics and design | 2001

High density capacitance structures in submicron CMOS for low power RF applications

Tirdad Sowlati; Vickram Vathulya; Domine M. W. Leenaerts

This paper presents four novel interconnect based capacitors with 2 to 3 times the capacitance density of a conventional metal sandwich capacitor and with self-resonant frequencies above 20 GHz, suitable for low power RF applications. Unlike the conventional capacitor, the capacitance density of these structures increases with the scaling of the technology. The structures have been fabricated in both 0.25 /spl mu/m and 0.18 /spl mu/m CMOS technologies, measured and an equivalent circuit presented.


international symposium on low power electronics and design | 2000

Bias boosting technique for a 1.9 GHz class AB RF amplifier

Tirdad Sowlati; Sifen Luo

A bias boosting technique for a 3.2V, 1.9GHz Class AB RF amplifier designed in a 30GHz BiCMOS process is presented in this paper. In a Class AB amplifier, the average current drawn from the supply depends on the input signal level. As the output power increases so does the average currents in both the emitter and the base of the power transistor. The increased average current causes an increased voltage drop in the biasing circuitry and the ballast resistor. This reduces the conduction angle in the amplifier, pushing it deep into Class B and even Class C operation, reducing the maximum output power by 25%. To avoid the power reduction, the amplifier should have a larger bias which inevitably has a larger power dissipation at low output power levels. The proposed bias boosting circuitry dynamically increases the bias of the power transistor as the output power increases. The amplifier has less power dissipation at low power levels with an increased maximum output power.


radio frequency integrated circuits symposium | 2001

A monolithic Si PCS-CDMA power amplifier with an impedance-controllable biasing scheme

Sifen Luo; Tirdad Sowlati

This paper for the first time presents a monolithic Si PCS-CDMA power amplifier (PA) capable of delivering 28.2 dBm output power with 30% power-added efficiency (PAE) and -45 dBc adjacent-channel-power ratio (ACPR) at 1.9 GHz and 3.6 V supply voltage. The PA implemented in a 30 GHz BiCMOS process incorporates a novel impedance-controllable biasing scheme to control class of operation and bias impedance of the output stage.


Archive | 2000

Interdigitated multilayer capacitor structure for deep sub-micron CMOS

Tirdad Sowlati; Vickram Vathulya


Archive | 2001

MULTILAYER CAPACITOR STRUCTURE HAVING AN ARRAY OF CONCENTRIC RING-SHAPED PLATES FOR DEEP SUB-MICRON CMOS

Vickram Vathulya; Tirdad Sowlati


Archive | 2000

Multilayer pillar array capacitor structure for deep sub-micron CMOS

Tirdad Sowlati; Vickram Vathulya


Archive | 2001

Multilayered capacitor structure with alternately connected concentric lines for deep sub-micron CMOS

Tirdad Sowlati; Vickram Vathulya


Archive | 2000

Dynamic bias boosting circuit for a power amplifier

Tirdad Sowlati; Sifen Luo


Archive | 2000

Cascode bootstrapped analog power amplifier circuit

Tirdad Sowlati


Archive | 2001

SELF-BIASED CASCODE RF POWER AMPLIFIER IN SUB-MICRON TECHNICAL FIELD

Tirdad Sowlati

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