Darko Mitic
University of Niš
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Featured researches published by Darko Mitic.
international conference on industrial technology | 2006
Cedomir Milosavljevic; Branislava Perunicic-Drazenovic; Boban Veselic; Darko Mitic
Sampled-data (SD) variable structure control systems (VSCS) with quasi-sliding mode (QSM) are treated in this paper as a logical extension of VSCS with ideal sliding mode (SM). The most of well-known SD QSM control algorithms are derived by starting from reaching law approach. The problems of robustness to uncertainties, loads and unmodeled inertial dynamics are considered and some methods to solve these problems are presented. An example that illustrates SD QSM VSCS properties is given.
Advances in Electrical and Computer Engineering | 2013
Darko Mitic; S. Lj. Peric; Dragan Antić; Zoran Jovanovic; Marko Milojković; Saša S. Nikolić
The control of anti-lock braking system is a great challenge, because of the nonlinear and complex characteristics of braking dynamics, unknown parameters of vehicle environment and sy ...
IEEE-ASME Transactions on Mechatronics | 2016
Staniša Lj. Perić; Dragan Antić; Miroslav B. Milovanović; Darko Mitic; Marko Milojković; Saša S. Nikolić
This paper presents a new control method for nonlinear discrete-time systems, described by an input-output model which is based on a combination of quasi-sliding mode and neural networks. First, an input-output discrete-time quasi-sliding mode control with inserted digital integrator, which additionally reduces chattering, is described. Due to the presence of various nonlinearities and uncertainties, the model of the controlled object cannot be described adequately enough. These imperfections in modeling cause a modeling error, resulting in rather poor system performances. In order to increase the steady-state accuracy, an estimated value of the modeling error in the next sampling period is implemented into the control law. For this purpose, we propose two improved structures of the neural networks by implementing the generalized quasi-orthogonal functions of Legendre type. These functions have already been proven as an effective tool for the signal approximation, as well as for modeling, identification, analysis, synthesis, and simulation of dynamical systems. Finally, the proposed method is verified through digital simulations and real-time experiments on an anti-lock braking system as a representative of the considered class of mechatronic systems, in a laboratory environment. A detailed analysis of the obtained results confirms the effectiveness of the proposed approach in terms of better steady-state performances.
international workshop on variable structure systems | 2006
Boban Veselic; Cedomir Milosavljevic; Branislava Perunicic-Drazenovic; Darko Mitic
This paper considers the design of robust servo system for accurate tracking of complex referent signals in the presence of internal and external disturbances. Discrete-time sliding mode tracking controller is employed in servo-system design. In order to improve tracking accuracy, application of active disturbance estimator is suggested. The same sliding mode controller, designed for reference tracking of nominal system, is identically implemented in the control subsystem within the estimator. The overall servo-system exhibits high tracking accuracy under action of parameter uncertainties and external disturbances. Experimental results confirm the effectiveness of the proposed servo-system structure
international workshop on variable structure systems | 2006
Darko Mitic; Cedomir Milosavljevic; Branislava Perunicic-Drazenovic; Boban Veselic
The paper deals with the design of digital sliding mode controllers using only input and output sequences of plant. Two approaches are considered. The first one is based on the sliding mode based generalized minimum variance control implemented on the linearized plant model, whereas the second one utilizes the similar idea from the previous method modified for and applied on the discrete-time nonlinear model of the plant. The proposed algorithms are presented and tested by digital simulation on an example of inverted pendulum control
symposium on applied computational intelligence and informatics | 2013
Darko Mitic; Miodrag Spasic; Morten Hovd; Dragan Antić
This paper presents the combination of generalized predictive and sliding mode control techniques in order to improve the system robustness to parameter variation. The proposed control algorithm belongs to the group of chattering-free sliding mode control laws, and it provides the minimum value of the cost function in the presence of parameter perturbations. Digital simulation results are given to verify the sliding mode based generalized predictive controller.
international conference on telecommunications | 2007
Darko Mitic; Marko Milojković; Dragan Antić
This paper deals with the design of digital fuzzy sliding mode control where only the plant output is used for the realization of control algorithm. The suggested concept is based on minimum variance control approach with disturbance estimator. The additional filtration of nonlinear, fuzzy, control component is performed by using the digital integrator. The higher accuracy in steady-state is also reached for a size range relative to the existing solutions.
symposium on applied computational intelligence and informatics | 2012
Darko Mitic; Dragan Antić; Staniša Lj. Perić; Marko Milojković; Saša Nikolić
A combination of two control methods, sliding mode and fuzzy, for the wheel slip control in anti-lock braking system, is presented in this paper. The fuzzy block is used to determine the values of key parameters important for establishing switching function dynamics. It is demonstrated, via performed experiments, that proposed control algorithm gives good system performances.
International Journal of Electronics | 2006
Goran Jovanovic; Darko Mitic; Mile K. Stojcev
Clock distribution and generation circuitry forms a critical component of current synchronous digital systems. Digital system clocks must not only have low jitter and low skew, but also a well-controlled duty cycle in order to facilitate versatile clocking techniques. In high-speed complementary metal oxide semiconductor (CMOS) clock buffer design, the duty cycle of a clock is liable to be changed when the clock passes through a multistage buffer because the circuit is not pure digital (Fenghao and Svensson 2000). In this paper, we propose a pulsewidth control loop referred as adaptive pulsewidth control loop (APWCL) that adopts the same architecture as the conventional PWCL, but with two modifications. The first one relates to implementation of the pseudo inverter control stage (PICS), while the second to involvement of adaptive control loop. The first modification provides generation of output pulses during all APWCLs modes of operation and the second faster locking time. For 1.2 μm double-metal double-poly CMOS process with Vdd = 5 V and operating frequency of 100 MHz, results of SPICE simulation show that the duty cycle can be well controlled in the range from 20% up to 80% if the loop parameters are properly chosen.
Journal of Circuits, Systems, and Computers | 2016
Goran Jovanovic; Darko Mitic; Mile K. Stojcev; Dragan Antić
This paper describes the design of a self-tuning OTA-C notch filter (NF), based on a phase control loop concept. The phases of filter input and output signals are compared and the phase error is used to generate the control voltage, which adjusts the transconductances of operational transconductance amplifiers (OTAs) and, consequently, tunes the NF center frequency without quality factor variation. The proposed solution is robust to filter parameter variations. The filter is implemented in 0.13μm SiGe BiCMOS technology. Under the typical circuit operating conditions, the center frequency tuning is within the range from 70MHz up to 150MHz, with tuning error less than 1%. The power consumption is less than 3.6mW, the 1dB gain compression point is −2.5dBm, the input (IIP3) and output (OIP3) intercept points are 3.47 and 9.07dBm, respectively, and the total filter effective noise voltage is 4.35μVrms. The filter structure is suitable for complementary metal-oxide-semiconductor (CMOS) implementation.