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Featured researches published by David B. Glasco.


international symposium on microarchitecture | 2011

GPUs and the Future of Parallel Computing

Stephen W. Keckler; William J. Dally; Brucek Khailany; Michael Garland; David B. Glasco

This article discusses the capabilities of state-of-the art GPU-based high-throughput computing systems and considers the challenges to scaling single-chip parallel-computing systems, highlighting high-impact areas that the computing research community can address. Nvidia Research is investigating an architecture for a heterogeneous high-performance computing system that seeks to address these challenges.


Archive | 2009

Apparatus, system, and method for using page table entries in a graphics system to provide storage format information for address translation

John S. Montrym; David B. Glasco; Steven E. Molnar


Archive | 2006

Memory access techniques providing for override of page table attributes

David B. Glasco; John S. Montrym


Archive | 2008

Multi-class data cache policies

David B. Glasco; Peter B. Holmqvist; George R. Lynch; Patrick R. Marchand; James Roberts


Archive | 2010

EFFICIENT LINE AND PAGE ORGANIZATION FOR COMPRESSION STATUS BIT CACHING

David B. Glasco; Peter B. Holmqvist; George R. Lynch; Patrick R. Marchand; Karan Mehra; James Roberts; Cass W. Everitt; Steven E. Molnar


Archive | 2007

Interprocessor direct cache writes

John M. Danskin; Emmett M. Kilgariff; David B. Glasco; Sean J. Treichler


Archive | 2008

System and method for cleaning dirty data in an intermediate cache using a data class dependent eviction policy

David B. Glasco; Peter B. Holmqvist; George R. Lynch; Patrick R. Marchand; James Roberts; John H. Edmondson


Archive | 2008

Cache-based control of atomic operations in conjunction with an external ALU block

David B. Glasco; Peter B. Holmqvist; George R. Lynch; Patrick R. Marchand; Karan Mehra; James Roberts


Archive | 2014

Compression Status Bit Cache And Backing Store

David B. Glasco; Peter B. Holmqvist; George R. Lynch; Patrick R. Marchand; Karan Mehra; James Roberts


Archive | 2008

System, method and frame buffer logic for evicting dirty data from a cache using counters and data types

David B. Glasco; Peter B. Holmqvist; George R. Lynch; Patrick R. Marchand; James Roberts; John H. Edmondson

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