David C. Craft

Low-power modular parallel photonic data links

Many of the potential applications for parallel photonic data links could benefit from a bi-directional Optoelectronic Multi-Chip Module (OEMCM), where the optical transmitter, receiver, and first-level interface electronics are combined into a single package. It would be desirable for such a module to exhibit low power consumption, have a simple electronic interface that can operate at a variety of speeds and possess a capability to use interchangeable optics for a variety of external connections. Here, we describe initial results for a parallel photonic link technology that exhibits those properties. This link uses high-efficiency, back-emitting, two-dimensional Vertical Cavity Surface-Emitting Laser (VCSEL) arrays operating at 980 nm. The lasers are matched, via integrated microlenses, to corresponding monolithically-integrated photoreceiver arrays that are constructed in a InGaAs/InP Heterojunction Bipolar Transistor (HBT) technology. In initial breadboard-level tests, the photonic data channels built with these devices have been demonstrated with direct (3.3 V) CMOS drive of the VCSELs and a corresponding CMOS interface at the photoreceiver outputs. These links have shown electrical power consumption as low as 42 mW per channel for a 50% average duty cycle while operating at 100 Mb/s.

Low-power approaches for parallel free-space photonic interconnects

Future advances in the application of photonic interconnects will involve the insertion of parallel-channel links into Multi-Chip Modules (MCMs) and board-level parallel connections. Such applications will drive photonic link components into more compact forms that consume far less power than traditional telecommunication data links. These will make use of new device-level technologies such as vertical cavity surfaceemitting lasers and special low-power parallel photoreceiver circuits. Depending on the application, these device technologies will often be monolithically integrated to reduce the amount of board or module real estate required by the photonics. Highly parallel MCM and board-level applications will also require simplified drive circuitry, lower cost, and higher reliability than has been demonstrated in photonic and optoelectronic technologies. An example is found in two-dimensional point-to-point array interconnects for MCM stacking. These interconnects are based on high-efficiency Vertical Cavity Surface Emitting Lasers (VCSELs), Heterojunction Bipolar Transistor (HBT) photoreceivers, integrated micro-optics, and MCM-compatible packaging techniques. Individual channels have been demonstrated at 100 Mb/s, operating with a direct 3.3V CMOS electronic interface while using 45 mW of electrical power. These results demonstrate how optoelectronic device technologies can be optimized for low-power parallel link applications.

Low-power, parallel photonic interconnections for multi-chip module applications

New applications of photonic interconnects will involve the insertion of parallel-channel links into Multi-Chip Modules (MCMs). Such applications will drive photonic link components into more compact forms that consume far less power than traditional telecommunication data links. MCM-based applications will also require simplified drive circuitry, lower cost, and higher reliability than has been demonstrated currently in photonic and optoelectronic technologies. The work described is a parallel link array, designed for vertical (Z-Axis) interconnection of the layers in a MCM-based signal processor stack, operating at a data rate of 100 Mb/s. This interconnect is based upon high-efficiency VCSELs, HBT photoreceivers, integrated micro-optics, and MCM-compatible packaging techniques.

Low-power, high-speed InGaAs/InP photoreceiver for highly-parallel optical data links

Low-power photoreceivers based on InGaAs/InP heterojunction bipolar transistors (HBTs) and p-i-n diodes for highly-parallel optical data links have been designed, fabricated and characterized. The receivers are designed to operate from 980 nm to over 1.3 /spl mu/m and interface directly with 3.3 V CMOS. SPICE was utilized to investigate circuit topographies that minimize power dissipation while maintaining large signal operation required to interface directly with CMOS. Low-power dissipation of /spl sim/10 mW/channel has been achieved at bit rates up to 800 Mbits/sec. Performance characteristics of discrete HBTs and of low-power photoreceivers fabricated with p-i-n/HBT circuits are reported.

Distributed algorithms for small vehicle detection, classification and velocity estimation using unattended ground sensors

This study developed a distributed vehicle target detection and estimation capability using two algorithmic approaches designed to take advantage of the capabilities of networked sensor systems. The primary interest was on small, quiet vehicles, such as personally owned SUVs and light trucks. The first algorithm approach utilized arrayed sensor beamforming techniques. In addition, it demonstrated a capability to find locations of unknown roads by extending code developed by the Army Acoustic Center for Excellence at Picatinny Arsenal. The second approach utilized single (non-array) sensors and employed generalized correlation techniques. Modifications to both techniques were suggested that, if implemented, could yield robust methods for target classification and tracking using two different types of networked sensor systems.

Future manufacturing techniques for stacked MCM interconnections

As multichip modules (MCMs) grow in chip count and complexity, increasingly large numbers of input/output (I/O) channels will be required for connection to other MCMs or printed wiring boards. In applications such as digital signal processing, large increases in processing density (number of operations in a given volume) can be obtained in stacked MCM arrangements. The potential pin counts and required I/O densities in these stacked architectures will push beyond the limits of present interlevel coupling techniques. This problem is particularly acute if easy separation of layers is needed to meet MCM testing and yield requirements. Solutions to this problem include the use of laser-drilled, metal-filled electrical vias in the MCM substrate and also optoelectronic data channels that operate in large arrays. These arrays will emit and detect signals traveling perpendicular to the surface of the MCM. All of these approaches will require packaging and alignment that makes use of advanced MCM manufacturing techniques.

Photonics for Z-axis stacking of multi-chip modules

The device designs used for this work are based on highly efficient vertical-cavity surface emitting lasers, connected to corresponding photoreceivers. In order to meet the constraints of packaging, the optical system used in the design is implemented by the integration of microlenses into the laser and photoreceiver substrates.

Low-power multi-chip module and board-level links for data transfer

Advanced device technologies such as vertical cavity surface emitting lasers (VCSELs) and diffractive micro lenses can be combined with novel packaging techniques to allow low-power interconnection of parallel optical signals. These interconnections can be realized directly on circuit boards, in a multi-chip module format, or in packages that emulate electrical connectors. For applications such as stacking of multi-chip module (MCM) layers, the links may be realized in bi-directional form using integrated diffractive microlenses. In the stacked MCM design, consumed electrical power is minimized by use of a relatively high laser output from high efficiency VCSELs, and a receiver design that is optimized for low power, at the expense of dynamic range. WIthin certain constraints, the design may be extended to other forms such as board-level interconnects.

Ultra-low-power, long-wavelength photoreceivers for massively-parallel optical data links

An ultra-low-power, long-wavelength photoreceiver based on InGaAs-InP heterojunction bipolar transistors is reported. The photoreceivers were designed for massively parallel applications where low-power density is necessary for both electrical and thermal reasons. We demonstrate two-dimensional, four-by-four arrays of photoreceivers for free-space optical data links that interface directly with 3.3 V CMOS ASICs and dissipate less than 12 mW/channel; lower power is possible. Propagation delays of /spl sim/1 nsec were measured and large signal operation to 800 Mbits/sec is demonstrated. The array is on a 500 /spl mu/m pitch and can be easily scaled to much higher density. The photoreceivers can be utilized in both free-space and guided-wave applications.

Frequency response of a TeO{sub 2} slow shear wave acousto-optic cell exposed to radiation

Radiation testing of photonic components is not new, however component level testing to date has not completely addressed quantities which are important to system behavior. One characteristic that is of particular importance for optical processing systems is the frequency response. In this paper, we present the results of the analysis of data from an experiment designed to provide a preliminary understanding of the effects of radiation on the frequency response of acousto-optic devices. The goal is to present possible physical mechanisms responsible for the radiation effects and to discuss the effects on signal processing functionality. The experiment discussed in this paper was designed by Sandia National Laboratories (SNL) and performed by SNL and Phillips Laboratory (PL) personnel at White Sands Missile Range (WSMR). In the experiment, a TeO2 slow shear-wave aocusto-optic cell was exposed to radiation from the WSMR linear accelerator. The TeO2 cell was placed in an experimental configuration which allowed swept frequency diffracted power measurements to be taken during radiation exposure and recovery. A series of exposures was performed. Each exposure consisted of between 1 to 800, 1 microsecond(s) ec radiation pulses (yielding exposures of 2.25 kRad(Si) to 913 kRad(Si), followed by recovery time. At low total and cumulative doses, the bandshape of the frequency response (i.e. diffracted power vs. frequency) remained almost identical during and after radiation. At the higher exposures, however, the amplitude and width of the frequency response changed as the radiation continued, but returned to the original shape slowly after the radiation stopped and recovery proceeded. It is interesting to note that the location of the Bragg degeneracy does not change significantly with radiation. In this paper, we discuss these effects, and we discuss the effect on the signal processing functionality.