David L. Blackburn

An analytical model for the steady-state and transient characteristics of the power insulated-gate bipolar transistor

Abstract An analytical model for the power Insulated-Gate Bipolar Transistor (IGBT) is developed. The model consistently describes the IGBT steady-state current-voltage characteristics and switching transient current and voltage waveforms for all loading conditions. The model is based on the equivalent circuit of a MOSFET which supplies the base current to a low-gain, high-level injection, bipolar transistor with its base virtual contact at the collector end of the base. The basic element of the model is a detailed analysis of the bipolar transistor which uses ambipolar transport theory and does not assume the quasi-static condition for the transient analysis. This analysis differs from the previous bipolar transistor theory in that (1) the relatively large base current which flows from the collector end of the base is properly accounted for, and (2) the component of current due to the changing carrier distribution under the condition of a moving collector-base depletion edge during anode voltage transitions is accounted for. Experimental verification of the model using devices with different base lifetimes is presented for the on-state current-voltage characteristics, the steady-state saturation current, and the current and voltage waveforms for the constant voltage transient, the inductive load transient, and the series resistor-inductor load transient.

Temperature measurements of semiconductor devices - a review

There are numerous methods for measuring the temperature of an operating semiconductor device. The methods can be broadly placed into three generic categories: electrical, optical, and physically contacting. The fundamentals underlying each of the categories are discussed, and a review of the variety of techniques within each category is given. Some of the advantages and disadvantages as well as the spatial, time, and temperature resolution are also provided.

Thermal component models for electro-thermal network simulations

A procedure is given for developing thermal component models for electrothermal network simulation. In the new electrothermal network simulation methodology, the simulator solves for the temperature distribution within the semiconductor devices, packages, and heat sinks (thermal network) as well as the currents and voltages within the electrical network. The thermal network is represented as an interconnection of compact thermal component models so that the system designer can readily interchange different thermal components and examine different configurations of the thermal network. To facilitate electrothermal network design, the interconnection of the thermal component models is specified by the user in the same way that the interconnection of the electrical network components is specified. The thermal component models are also parameterized in terms of structural and material parameters so that the details of the heat transport physics are transparent to the user. Examples of electrothermal network simulations are given, and the temperature measurement methods used to validate the thermal component models are described. >

Simulating the dynamic electrothermal behavior of power electronic circuits and systems

The simulator solves for the temperature distribution within the semiconductor devices, packages, and heat sinks (thermal network) as well as the currents and voltages within the electrical network. The thermal network is coupled to the electrical network through the electrothermal models for the semiconductor devices. The electrothermal semiconductor device models calculate the electrical characteristics based on the instantaneous value of the device silicon chip surface temperature and calculate the instantaneous power dissipated as heat within the device. The thermal network describes the flow of heat from the chip surface through the package and heat sink and thus determines the evolution of the chip surface temperature used by the semiconductor device models. The thermal component models for the device silicon chip, packages, and heat sinks are developed by discretizing the nonlinear heat diffusion equation and are represented in component form so that the thermal component models for various packages and heat sinks can be readily connected to one another to form the thermal network. >

Micromachined thermal radiation emitter from a commercial CMOS process

Fabrication of thermally isolated micromechanical structures capable of generating thermal radiation for dynamic thermal scene simulation (DTSS) is described. Complete compatibility with a commercial CMOS process is achieved through design of a novel, but acceptable, layout for implementation by the CMOS foundry using its regular process sequence. Following commercial production and delivery of the CMOS chips, a single maskless etch in an aqueous ethylemediamine-pyrocatechol mixture is performed to realize the micromechanical structures. The resulting structures are suspended plates consisting of polysilicon resistors encapsulated in the field and CVD (chemical-vapor-deposited) oxides available in the CMOS process. The plates are suspended by aluminum heater leads that are also encapsulated in the field and CVD oxides. Studies of the suitability of these structures for DTSS have been initiated, and early favorable results are reported.<<ETX>>

Transient Thermal Response Measurements of Power Transistors

Differences between the measured thermal impedance of power transistors when determined by the pulsed heating curve and cooling curve techniques are discussed. These differences are shown to result primarily because the power density distributions of these devices change as devicesheat; as a result of these changes the heating curve and the cooling curve are not conjugate. It is shown that the cooling curve technique, when the cooling curve is initiated from the most non-uniform steady-state thermal, distribution, (maximum voltage, maximum power) will indicate a larger value for the thermal impedance than will the pulsed heating curve technique, even for pulses in excess of the dc power level. A one-dimensional model for power transistor cooling is described. The theoretical predictions of the model are shown to be in good agreement for practical applications with three-dimensional computer simulations and experimental results. Using this model, it is possible to estimate an average junction temperature and the area of power generation at steady-state. Both TO-66 and TO-3 encased devices of mesa and planar structures were included in this study.

A Performance Trade-Off for the Insulated Gate Bipolar Transistor: Buffer Layer Versus Base Lifetime Reduction

A one-dimensional analytic model for the Insulated Gate Bipolar Transistor (IGBT) which includes a high-doped buffer layer in the low-doped bipolar transistor base is developed. The model is used to perform a theoretical trade-off study between IGBTs with and without the buffer layer. The study is performed for devices of equal breakdown voltages, and the critical parameters chosen to “trade-off” are turn-off switching energy loss (related to turn-off time) and on-state voltage, both at a given current. In this study, as in reality, the two critical parameters are varied by: 1) adjusting the doping concentration and thickness of a buffer layer included as part of the bipolar transistor base, 2) adjusting the lifetime in the lowly doped bipolar transistor base with no buffer layer included, or by 3) a combination of 1) and 2). The results of the model predict that for equal breakdown voltages, an optimized device with a buffer layer has less switching energy loss for a given on-state voltage than an optimized device with no buffer layer.

Turn-Off Failure of Power MOSFET's

Experimental results of the failure of power MOSFETs during inductive turn-off are discussed. The electrical characteristics of these devices during failure are shown to be identical to those of a bipolar transistor undergoing second breakdown. Other comparisons of the power MOSFET failure and bipolar second breakdown are made. A nondestructive measurement system is used that allows repeated measurements of the failure characteristics as a function of various parameters to be made on a single device. It is shown that commercially available power MOSFETs do not fail as a result of dV/dt currents. Drain voltage slew rates up to 22 V/ns were studied. Other measurements show that the drain voltage at which failure occurs increases with temperature, the critical current above which failure occurs decreases with temperature, and the magnitude of the load inductance has no effect on the failure. The results of this study are consistent with the theory that activation of the parasitic bipolar transistor initiates the power MOSFET failure during turn-off.

Power MOSFET temperature measurements

Three temperature-sensitive electrical parameters are compared as thermometers for power MOSFET devices. The parameters are the forward drain-body diode voltage, the source-gate voltage, and the on-resistance. The results are also compared with temperatures measured with an infrared microradiometer. The procedure, apparatus, and circuits required to use each of the parameters as a thermometer are described. Some general considerations for measuring the temperature of power semiconductor devices are also discussed. Each parameter is found to be satisfactory for measuring the temperature of power MOSFETs. The sourcegate voltage measures a temperature nearest to the peak device temperature, and the drain-body diode voltage shows the least variation in calbiration from device to device.

Modeling and Simulation of Resistivity of Nanometer Scale Copper

Abstract A highly versatile simulation program was developed and used to examine how the resistivity of thin metal films and lines is increased as their dimensions approach and become smaller than the mean free path of electrons in metals such as copper and aluminum. The simulation program is flexible in that it can include the effects of surface and grain-boundary scattering on resistivity either separately or together, and it can simulate the effect on resistivity where each surface of a film or line has a different value for the scattering parameter. The simulation program (1) provides a more accurate calculation of surface scattering effects than that obtained from the usual formulation of Fuchs’ theory, (2) calculates grain-boundary effects that are consistent with the theory of Mayadas and Shatzkes, (3) shows that surface and grain-boundary scattering effects are interdependent, and (4) shows that the change in resistivity with temperature begins to increase as dimensions approach the bulk mean free path of the electrons in the metal.