David Navarro

Novel CNTFET-based reconfigurable logic gate design

This paper describes a dynamically reconfigurable 8-function logic gate (CNT-DR8F) based on a double-gate carbon nanotube field effect transistor (DG-CNTFET). The design is based on a property specific to this device: ambivalence, enabling p-type or n-type behavior depending on the back-gate voltage. Using available models, CNT-DR8F is proposed, simulated and analyzed at 20 GHz operation. We also give an example functional block (full adder) to show how to construct logic circuits based on the association of physically identical reconfigurable logic cells.

A low power wireless sensor node with vibration sensing and energy harvesting capability

This paper describes the design of the wireless sensor network node (WSN) for distributed active vibration control (AVC) system for the automotive application. The approach of the system is presented in details. A WSN node using one piezoelectric element provides several features (sensing, shunting and energy harvesting). Integration of the vibration sensing capability for active vibration control system with the energy harvesting capability is described here. Simulation results are compared with the prototype design.

Fast optical simulation from a reduced set of impulse responses using SystemC-AMS

In this paper we propose a methodology to simulate the optical filtering system of a camera module with limited access to proprietary data. The target of the simulation is the virtual prototyping of the overall camera module for a fine tuning of the auto-focus mechanism. For the optical system modeling, the methodology is based on the usage of some point spread functions (PSFs). The use of the full set of PSFs is computationally costly and memory space consuming hence compromising the usability of the optical model in the full system virtual prototyping. To improve the model execution time, PSFs interpolation and free-space propagation techniques are used: they allow reducing the sampling space with minimal impact on the accuracy of the model (sharpness error less than 2%). The total speed-up gain with respect to the standard non-optimized model is provided by two contributors. First, the interpolation technique leads to a speed-up linked to the PSFs number reduction. Second, the caching of computationally intense processes enables speed-up scaling with the number of frames.

Towards a design framework for heterogeneous Wireless Sensor Networks

Wireless Sensor Networks consist of resource-constrained (energy, memory and processing) sensor nodes that are deployed at different locations, in order to monitor physical or environmental conditions. Several limitations exist nowadays, at simulation and at programming level, especially for heterogeneous Wireless Sensor Networks (composed of different hardware devices). Indeed, to optimize a self-organized network, it is essential to be able to exchange functionalities between nodes. First, it is difficult to explore design space with accurate hardware-level models for network-level simulations since these two aspects have very different levels. We propose a simulator - based on SystemC language- that allows such explorations. It is composed of a library of electrical devices and software stacks, experimentally validated. More and more sophisticated software support is implemented in our simulator. As trend is to deploy heterogeneous nodes, it becomes a challenge to consider energy-aware reprogramming of different nodes, and to be able to simulate this aspect. We propose a new solution -cross-architecture in-situ compilation- that allows firmware update for functionality exchange, and that is being integrated in the simulator.

A complete system-level behavioural model for IEEE 802.15.4 Wireless Sensor Network simulations

This paper presents a complete SystemC-based Wireless Sensor Network model. It implements the entire IEEE 802.15.4 standard, and permits to simulate scenarios at high level, taking hardware and software low level parameters into account, also enabling design space exploration for system level designers.