David P. Kennedy

Spreading Resistance in Cylindrical Semiconductor Devices

For cylindrical semiconductor components, computation of spreading resistance is considered a boundary value problem of the solid circular cylinder. Solutions of this problem may be used, for example, to characterize the thermal spreading resistance within the package of a semiconductor device, the electrical spreading resistance in a mesa type parametric diode, and the extrinsic collector resistance of a mesa transistor. Equations describing the thermal (or electrical) spreading resistance are presented in graphical form for a range of geometrical parameters applicable to many practical situations. Further, examples are given for the potential distribution within each cylindrical structure considered in this analysis.

Analysis of the impurity atom distribution near the diffusion mask for a planar p-n junction

Presented here are the results from a mathematical investigation of the impurity atom distribution within a planar p-n junction. Two fundamentally different diffusion processes are considered: In the first, a constant impurity atom concentration is maintained at the semiconductor surface; in the second, a fixed quantity of impurity atoms is involved in the entire diffusion process. The results of this investigation show than a one-dimensional approximation inadequately characterizes the impurity atom distribution within a planar junction, and that in theory, the planar junction is not at a constant distance from its impurity atom source. Instead, the junction is closer to its source at the semiconductor surface than deep within the bulk material. Further, it is shown that when diffusion takes place from a source of constant concentration density, the junction impurity atom gradient is maximum at the semiconductor surface. In contrast, this junction impurity atom gradient is shown to exhibit a minimum at the semiconductor surface when the total number of impurity atoms is time invariant throughout the entire semiconductor material.

A statistical approach to the design of diffused junction transistors

Monte Carlo methods of statistical analysis are applied to the problems of transistor design and optimization. The experimental tolerances associated with any diffusion process are shown to represent an important factor in the initial design of diffused junction transistors. Many transistor parameters exhibit a substantial degree of sensitivity to small variations in the diffusion process. This is confirmed by a comparison between the theoretical and experimental open-base breakdown voltage, and current gain, for a large number of devices. It is therefore proposed that the design of a transistor be based upon attaining a specified set of electrical characteristics when the device is assumed to be fabricated by a non-ideal diffusion process. An electronic computer has been used in an investigation of the foregoing problem. The investigation shows further that a margin-of-safety must be designed into each electrical parameter of a transistor to assure that the resulting device satisfies a given set of design specifications, even though this margin-of-safety may differ for each parameter. In this paper examples are presented to illustrate the theoretical trade-off between several opposing transistor parameters that exhibit a substantial degree of variability due to a non-ideal diffusion process.

Base Region Transport Characteristics of a Diffused Transistor

A one‐dimensional analysis is given on the minority carrier transport characteristics of a transistor base region containing an arbitrary drift field distribution. This field is assumed to enhance—or retard—the motion of minority carriers between an emitter and collector junction, thereby modifying the influence of bulk recombination mechanisms. Base region transport efficiency is established in terms of the transistor current gain when an ideal emitter junction is assumed. Applications of this analysis are demonstrated by establishing the base region transport efficiency for diffused transistors. Two types of structures have been analytically investigated: the alloy‐diffused transistor, containing a diffused collector junction and an alloy‐type emitter; and the double‐diffused transistor constructed entirely by diffusion techniques. For practical semiconductor devices, a comparison of these two structures has shown negligible differences in their base region transport efficiency and, furthermore, the dri...

Depletion Layer Properties in Double Diffused Transistors

ABSTRACT For the double diffused transistor, Poissons equation is solved in one dimension; this solution is used to determine depletion layer properties of its collector and emitter junctions. Assuming an impurity atom distribution characterized by the summation of complementary error functions, depletion layer widths are established far the equilibrium emitter junction and for the reverse biased collector junction. Applications of this analysis are presented throughout a wide range of physical and geometrical parameters; graphical illustrations are given for the electrical base width, the collector ‘ punch-through ’ voltage, and others.

Analysis of epitaxial layer thickness variability in the fabrication of high performance bipolar transistors

Abstract Measurements indicate that a thickness variation of approximately 7·0 per cent (2σ) can be expected from modern epitaxial reactors. This epitaxial layer thickness variability, in conjunction with the technique of designing into a transistor collector junction and buried layer interference, will often produce problems of fabrication reproducibility. Statistical calculations are presented to demonstrate some fabrication difficulties that are mathematically attributable to this thickness variability. Problems arising from simple space-charge layer interference are compared with those arising from deep penetration of the collector junction into its buried layer.

Open-base Breakdown in Diffused N-P-N Junction Transistors†

ABSTRACT A one-dimensional analysis is presented on the open-base breakdown characteristics of diffused n-p-n transistors. From breakdown voltage measurements upon selected devices—in conjunction with breakdown voltage calculations—‘ effective ’ values are established for the ionization rate of electrons in germanium and silicon p-n junctions, when biased substantially below avalanche breakdown. These ‘ effective ’ electron ionization rates are used to calculate the open-base breakdown voltage for transistors exhibiting a large collector punch-through voltage ; such calculations are graphically illustrated throughout iv range of parameters applicable to many practical situations. A discussion is also presented on the influence of an abrupt conductivity increase within the collector junction space-charge layer, of the typo encountered in an idealized epitaxial structure.

Theoretical current gain of a cylindrical mesa transistor

Abstract For the cylindrical mesa transistor, computation of base-region transport efficiency is considered a boundary-value problem; solution of this problem yields mathematical equations applicable to the design and development of practical semiconductor devices. This analytical method is applied to the problem of minority-carrier transport across a solid-cylinder type structure which approximates the transistor base region. Minority-carrier losses—representing a fundamental limitation upon transistor-current gain—are introduced through an assumption of bulk and surface-recombination mechanisms. Applications of this analysis are illustrated by establishing the common-emitter current gain for typical junction transistors. Assuming, in such computations, physical parameters approximating germanium and silicon diffused devices, the silicon transistor is shown to be less sensitive to surface recombination mechanisms. Further, the existence of an optimum emitter radius is demonstrated for a semiconductor structure similar to the cylindrical hook collector.

Minority Carrier Recombination in a Cylindrical Transistor Base Region

An analysis is given on the influence of bulk recombination within the base region of a mesa‐type drift transistor. The minority carrier transport efficiency is established for a solid cylinder base region and also for a simplified one‐dimensional structure. A comparison of the two minority carrier transport equations shows the approximate analysis will result in a negligible error when applied to practical semiconductor devices.