David R. McIntyre

An experiment with WWW interactive learning in university education

Abstract The World Wide Web coupled with user friendly Web browsers now provide access to multimedia Web pages in universally accepted formats that can be accessed world wide easily via inexpensive desk-top computers. Everyone appears to agree that this technology will revolutionize how students, faculty, researchers, and the public access and use information. Consequently university educators are now enjoying, for the first time in history, a new way to customize and share their unique approaches to teaching and information resources in the form of text, graphics, and sound—to students both on and off campus and, with concern for the future, across time. In this paper we discuss our exploration with the use of interactive learning on the Web in an Introduction to C Programming Course taught in the Department of Computer and Information Science at Cleveland State University, and compare results with the same course taught a previous semester using no interactive WWW learning.

Dynamic evaluation of hardware trust

Current research into Trojan detection suggests that exhaustive Trojan detection in a chip during limited manufacturing test time is an extremely difficult problem. Indeed, an especially nefarious form of Trojan known as the time bomb has a payload activated in a delayed manner making it extremely hard to detect. As a result, chip trust detection at manufacturing test time may not be adequate especially for critical applications. This suggests that some form of dynamic trust detection of the chip both preliminary (possibly during a preproduction phase) and during in-field use at run time is required. We explore an approach to this problem that combines multicore hardware with dynamic distributed software scheduling to determine hardware trust during in-field use at run time. Our approach involves the scheduling and execution of functionally equivalent variants (obtained by different compilations, or different algorithm variations) simultaneously on different PEs and comparing the results. The process dynamically achieves trust determination by identifying the existence of Trojans with a high level of confidence.

A supply-demand model based scalable energy management system for improved energy utilization efficiency

Harvesting energy from the environment can play an important role in reducing the dependency of an electronic system to primary energy sources (i.e. AC power or battery). For reliable and efficient energy harvesting while assuring best user experience, it is important to manage, route and match the harvested energy with the demand of various energy sources. In the most general case, multiple different energy sources can be used to provide energy to multiple different energy users. In this work, we propose a scalable rule-based energy management system for managing the acquisition, mixing, delivery and storage of energy for arbitrary collection of energy sources and users, which are characterized with different energy generation and consumption parameters. The system uses economics inspired supply-demand model for efficiently managing energy distribution between a set of energy sources and users. The energy allocation procedure tries to maximize the energy utilization efficiency of the sources while satisfying the demand of the users in order of their associated priorities, without starving an already allocated user. Simulation results for example scenarios show the effectiveness of the proposed approach for improving the energy utilization and lifetime of the energy sources.

Data compression using static Huffman code-decode tables

Both static and dynamic Huffman coding techniques are applied to test data consisting of 530 source programs in four different languages. The results indicate that, for small files, a savings of 22-91 percent in compression can be achieved by using the static instead of dynamic techniques.

Trustworthy computing in a multi-core system using distributed scheduling

Hardware Trust is an emerging problem in semiconductor integrated circuit (IC) security due to widespread outsourcing and the stealthy nature of hardware Trojans. Conventional post-manufacturing testing, test generation algorithms and test coverage metrics cannot be readily extended to hardware Trojan detection. As a result there is a need to develop approaches that will ensure trusted in-field operation of ICs, and more generally trust in computing. We present a distributed software scheduling prototype, TADS (Trojan Aware Distributed Scheduling), to achieve a Trojan-activation tolerant trustworthy computing system in a multi-core processor potentially containing hardware Trojans. TADS is designed to be transparent to applications and can run on general purpose multicore PEs without modifications to the operating system or underlying hardware. TADS can, with high confidence, continue to correctly execute its specified queue of job subtasks in the presence of hardware Trojans in the multi-core PEs while learning the individual trustworthiness of the individual PEs. Specially crafted self-checking subtasks called bounty hunters are introduced to accelerate PE trust learning. Also, by learning and maintaining individual PE trustworthiness, the scheduler is able to achieve Trojan containment by scheduling subsequent job subtasks to PEs with high learned trust.

An Improved Algorithm to Smooth Delay Jitter in Cyber-Physical Systems

Delay jitter is a critical factor that must be considered in networked real-time applications that require accurate prediction of packet delivery times. Delay jitter can be smoothed by holding packets in a play-back buffer for a certain time called a play-back delay. In this paper, we propose a scheme to enhance the prediction of the play-back delay in Networked Control Systems (NCSs) with no need for clock synchronization. Our newly proposed scheme differs from previous schemes by using the one way delay variation. We have studied the behavior of one way delay variation by conducting extensive measurements between 50 strategically located wired and wireless connected hosts. The advantage of our scheme is that it significantly improves handling of sudden delay spikes, provides a closer approximation to the round trip time (RTT), and exhibits less frequent outliers.

Test compression and hardware decompression for scan-based SoCs

We present a new decompression architecture suitable for embedded cores in SoCs which focuses on improving the download time by avoiding higher internal-to-ATE clock ratios and by exploiting hardware parallelism. The bounded Huffman compression facilitates decompression hardware tradeoffs. Our technique is scalable in that the downloadable RAM-based decode table and accommodates for different SoC cores with different characteristics such as the number of scan chains and test set data distributions.

Caching and other disk access avoidance techniques on personal computers

CPU processing speed is rapidly increasing on PCs, resulting in a widening gap between disk access and CPU speed. The performance of three common disk caching systems are examined in an effort to determine a technique for reducing the gap.

Smoothing delay jitter in networked control systems

Delay jitter is a critical factor that must be considered in many real-time applications that require accurate prediction of packet delivery times. Delay jitter can be smoothed by holding packets in a play-back buffer for a certain time called a play-back delay. In this paper, we extensively examine the new scheme that we have proposed in [1] to enhance the prediction of the play-back delay in Networked Control Systems (NCSs). Our newly proposed scheme differs from previous schemes by using the one way delay variation that we have studied its behavior by conducting extensive measurements between fifty strategically located wired and wireless connected hosts. The advantages of our scheme are that it predicts sudden delay spikes, provides a closer approximation to the round trip time (RTT), and exhibits less frequent outliers.

Avoiding Delay Jitter in Cyber-Physical Systems Using One Way Delay Variations Model

Delay jitter adversely affects the performance ofnetworked real-time applications that require accurate prediction of packet delivery times. Delay jitter can be smoothed by holding packets in a play-back buffer for a certain time called a playback delay. In this paper, we propose a scheme to enhance the prediction of the play-back delay in Networked Control Systems (NCSs) with no need for clock synchronization. Our newly proposed scheme differs from previous schemes by using the one way delay variation. We have studied the behavior of one way delay variation by conducting extensive measurements between 50 strategically located wired and wireless connected hosts. The advantage of our scheme is that it significantly improves handlingof sudden delay spikes, provides a closer approximation to the round trip time (RTT), and exhibits less frequent outliers.