David Reginald Trainer
Alstom
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Featured researches published by David Reginald Trainer.
IEEE Transactions on Power Delivery | 2014
Michael M. C. Merlin; Tim C. Green; Paul D. Mitcheson; David Reginald Trainer; Roger Critchley; Will Crookes; Fainan Hassan
This paper explains the working principles, supported by simulation results, of a new converter topology intended for HVDC applications, called the alternate arm converter (AAC). It is a hybrid between the modular multilevel converter, because of the presence of H-bridge cells, and the two-level converter, in the form of director switches in each arm. This converter is able to generate a multilevel ac voltage and since its stacks of cells consist of H-bridge cells instead of half-bridge cells, they are able to generate higher ac voltage than the dc terminal voltage. This allows the AAC to operate at an optimal point, called the “sweet spot,” where the ac and dc energy flows equal. The director switches in the AAC are responsible for alternating the conduction period of each arm, leading to a significant reduction in the number of cells in the stacks. Furthermore, the AAC can keep control of the current in the phase reactor even in case of a dc-side fault and support the ac grid, through a STATCOM mode. Simulation results and loss calculations are presented in this paper in order to support the claimed features of the AAC.
IEEE Transactions on Industry Applications | 2013
Ralph Feldman; Matteo Tomasini; Emmanuel K. Amankwah; Jon Clare; Patrick Wheeler; David Reginald Trainer; Robert Whitehouse
HVDC transmission systems are becoming increasingly popular when compared to conventional ac transmission. HVDC voltage source converters (VSCs) can offer advantages over traditional HVDC current source converter topologies, and as such, it is expected that HVDC VSCs will be further exploited with the growth of HVDC transmission. This paper presents a novel modular multilevel converter hybrid VSC intended for the HVDC market. The concept of the converter operation is described based on steady-state ac-dc power balance. Techniques for dynamic voltage control, enabling the active and reactive powers exchanged with the grid to be controlled, are introduced. Simulation results further illustrate the theory of operation of the converter and confirm the viability of the proposed control approaches. Detailed predictions of the semiconductor losses confirm the potential to achieve very high efficiencies with this topology. Experimental results are provided to validate the presented converter operation.
IEEE Transactions on Power Electronics | 2006
F.J. Chivite-Zabalza; Andrew J. Forsyth; David Reginald Trainer
A new converter topology for a three-phase multipulse rectifier circuit is described. This converter draws almost sinusoidal currents from the ac system with very low harmonic content and typically less than 3% total harmonic distortion. The topology uses only passive components and has a lower component count than other rectifier circuits with similar performance. Two six-pulse rectifier bridges are connected in series, fed by a series connection of transformers, to form a 12-pulse system. An additional low power harmonic injection circuit enhances the performance of the circuit to obtain low harmonic current pollution levels that are comparable with those achieved from a 24-pulse rectifier. The circuit operation is explained and experimental results are presented.
european conference on power electronics and applications | 2014
Colin Oates; Kevin J. Dyke; David Reginald Trainer
The Controlled Transition Bridge (CTB) is a converter topology that combines series connected semiconductor “director switches” with chains of switched capacitor modules, chainlink circuits, in such a way that the director switches carry the main current for a significant portion of the period and the chainlink elements provide a controlled traverse of voltage between different director switches conducting. The simplest example of this is where the director switches form a six pulse bridge and the chainlink elements traverse at a constant rate between the upper director switch conducting and the lower director switch conduction etc., so that the output AC waveform is a trapezoid. The use of a trapezoid waveform reduces the level of super harmonics significantly and with a star delta transformer to remove the “triple N” harmonics, the total harmonic distortion is reduced, but not sufficiently for use in HVDC application. The use of filtering is undesirable because of the VARs they introduce and while active filtering can be used there are control difficulties that need to be overcome, so a two slope trapezoid waveform is proposed in which the slope characteristics are chosen specifically to minimise a wide range of harmonics for a given fundamental magnitude. For this a cost function is derived that includes the functions of the harmonics being considered and a search is carried out using standard algorithms such as Newton-Raphson, to minimise its value within a given region. Modelling is used to demonstrate that the resulting primary THD would meet the requirements for VSC HVDC operation.
european conference on power electronics and applications | 2014
Mmc Merlin; Tim C. Green; Paul D. Mitcheson; Fj Moreno; Kevin J. Dyke; David Reginald Trainer
This paper presents a method to calculate the minimal size of cell capacitors in multilevel VSCs which meets a maximum voltage deviation criterion under ideal conditions. This method is applied to the Modular Multilevel Converter (MMC), the Alternate Arm Converter (AAC) and the hybrid multilevel converter with ac-side cascaded H-bridge cells (AC-CHB). The results show that the newer VSC topologies exhibits smaller energy deviation in their stacks, leading to an overall smaller volume of cell capacitors for the converter station but often accompanied by some compromises such as higher power losses or degraded DC current waveform quality.
european conference on power electronics and applications | 2014
Colin Oates; Kevin J. Dyke; David Reginald Trainer
The Controlled Transition Bridge (CTB) is a class of converter topology that combines series connected semiconductor “director valves” with chains of switched capacitor modules, “chainlink circuits”, in such a way that the director valves carry the main current for a significant portion of the period and the chainlink circuits provide a controlled traverse of voltage between different director valves conducting. This combination is applicable to HVDC where efficiency is paramount, since it allows thyristors or diodes to be used for the director valves to reduce the conduction losses, with the chainlink circuits providing commutation and direct control of the rate of change of transition voltage. Since the chainlink portion of the AMMC only has to manage the transition between the upper and lower director valves, the size of the capacitors in the individual sub-modules can be reduced, reducing the converter footprint. Also the trapezoidal waveform that results can be tailored to give reduced harmonic levels, so reducing filtering required for the AC waveform to meet regulations on distortion at the point of common coupling for the converter (PCC). An analysis is presented of an example of this type of converter where a modular multilevel converter (MMC) is combined with a conventional thyristor bridge, the Augmented MMC (AMMC). Various aspects of the operation of the bridge are discussed, including the management of the charge in the chainlink capacitors and the converter losses.
power and energy society general meeting | 2013
Thomas Luth; Michael M. C. Merlin; Tim C. Green; Carl Barker; Fainan Hassan; Roger Critchley; R W Crookes; David Reginald Trainer; Kevin J. Dyke
Demand for DC/DC conversion in HV applications is expected to rise because of the increasing number of HVDC links using different DC voltage levels. This paper presents a DC/AC/DC system consisting of two VSCs connected through an inductor. The two VSCs are Alternate Arm Converters (AAC). Since the two AACs share the same AC voltage level, they cannot be operated at their respective “sweet-spots” at the same time. This results in an energy drift in the valves which is tackled by additional balancing currents. However, the choice of the AC voltage level remains critical as it determines the required amount of balancing current, the number of devices and the cell topology, influencing greatly the total efficiency and volume of the obtained DC/DC converter. A study on a scale-down converter highlights the trade-offs affecting the AC voltage choice.
european conference on power electronics and applications | 2016
Emmanuel K. Amankwah; Alessando Costabeber; Alan Watson; David Reginald Trainer; Omar Jasim; Javie Chivite-Zabalza; Jon Clare
This paper presents a novel hybrid modular multilevel voltage source converter suitable for HVDC applications. It has the advantages of other modular multilevel topologies and can be made more compact making it attractive for offshore stations and city infeed applications. The Operating principle of the converter and internal energy management are discussed with simulation results from a scaled medium voltage demonstrator presented to validate the concepts.
IEEE Transactions on Power Delivery | 2018
Paul D. Judge; Michael M. C. Merlin; Tim C. Green; David Reginald Trainer; Konstantin Vershinin
Achieving dc fault tolerance in modular multilevel converters requires the use of a significant number of submodules (SMs) that are capable of generating a negative voltage. This results in an increase in the number of semiconductor devices in the current path, increasing converter conduction losses. This paper introduces a thyristor augmented multilevel structure called a Power-Group (PG), which replaces the stacks of SMs in modular converters. Each PG is formed out of a series stack of SMs with a parallel force-commutated thyristor branch, which is used during normal operation as a low loss bypass path in order to achieve significant reduction in overall losses. The PG also offers negative voltage capability and so can be used to construct high-efficiency dc fault tolerant converters. Methods of achieving the turn-on and turn-off of the thyristors by using voltages generated by the parallel stack of SMs within each PG are presented, while keeping both the required size of the commutation inductor, and the thyristor turn-off losses low. Efficiency estimates indicate that this concept could result in converter topologies with power losses as low as 0.3% rated power while retaining high quality current waveforms and achieving tolerance to both ac and dc faults.
9th IET International Conference on AC and DC Power Transmission (ACDC 2010) | 2010
Michael M. C. Merlin; Tim C. Green; Paul D. Mitcheson; David Reginald Trainer; D R Critchley; R W Crookes