David W. Knapp

The ADAM Advanced Design Automation System: Overview, Planner and Natural Language Interface

This paper describes ADAM, an integrated Advanced Design AutoMation system, with focus on the knowledge-based synthesis subsystem. Working parts of this subsystem include a number of design activities and utilities, and a unified, multidimensional, hierarchical design representation. Two aspects of the synthesis subsystem are described in detail: the design planner and the natural language interface. The planner builds a plan for synthesis and analysis activities, drawing inferences from a knowledge base represented by a semantic net. The natural language interface accepts system-level behavioral specifications. Both of these packages are currently being implemented.

A Design Utility Manager: the ADAM Planning Engine

In this paper we present a software package which manages the digital design process using a planning paradigm. Under this paradigm design is seen as a process in which abstract models of operators are applied to abstract models of design states in a simulated or planning space, until a sequence of operators has been constructed to completion. The hypothetical design represented by the terminal state is then estimated . Either the planning is then repeated, or the sequence, or plan , is then executed, or carried out, in an execution space. This execution is monitored for violation of expectations; if violations occur, control is returned to the planner. The knowledge base of the planner is populated with register transfer level (RTL) concepts, and it can be populated with other knowledge sets. The planner forms part of the USC ADAM (Advanced Design AutoMation) system.

Fasolt: a program for feedback-driven data-path optimization

The author describes Fasolt, a system that automatically optimizes the bus topology of a register-level data-path design. The unique aspect of Fasolt is that it uses information taken from a detailed layout model to choose optimizing transformations of the bus topology and the schedule of operations and transfers of an existing design. Such a system is called a feedback-drive system because it uses information derived at a low level (in this case, that of physical layout) to drive the selection of optimizing transformations at a higher level or levels (in this case, the scheduling and allocation levels). This allows the scheduling and topology synthesis steps to take wiring considerations into account in a way that has hitherto not been demonstrated in an automatic synthesis system. Experiments have shown that improvements in area, cycle time, and overall average delay can often be achieved in the same design using this approach. >

The ADAM design planning engine

A novel paradigm for managing the digital process is presented. Under this paradigm, design is seen as a process in which abstract models of design tools are applied to abstract models of design states in a simulated or planning space, until a sequence of design tasks has been constructed to completion. Important parameters of the hypothetical design represented by the terminal states are then estimated. Either the planning is then repeated, or the sequence, or plan, is then executed, or carried out, in an execution space. This execution is monitored for violation of expectations; if violations occur, control is returned to the planner. The knowledge base of the planner is populated with register-transfer level (RTL) concepts for digital system design; it can also be populated with other knowledge sets. The planner forms part of the USC advanced design automation (ADAM) system. >

Feedback-driven datapath optimization in Fasolt

Fasolt is a program that optimizes a register-level datapath design. Fasolt is unique in that it uses layout information to drive the choice of optimizing transformations; hence it is feedback-driven, because it uses low-level information to drive high-level decision making. Fasolt 1.0 uses critical path and channel density to select pairs of wire bundles to be merged, which may necessitate retiming. Hence scheduling and allocation can take wiring into account in a novel way, which has been sufficient to given 10 and 50% area reductions in naive initial designs.<<ETX>>

An Interactive Tool for Register-Level Structure Optimization

This paper presents a program named RLEXT (Register Level Exploration Tool), which allows a user to manually modify a register-level datapath design. The allowed operations are addition and deletion of components and connections. Any component not an i/o port, a register, or an addressable memory may be added or deleted. Any wire or connection of a pin to a wire may be added or deleted. The unique aspect of RLEXT is that the continued ability of the datapath to support its behavioral specifications is guaranteed: that is, if the user makes changes that would impair the datapaths ability to carry out the desired function, RLEXT will automatically repair the datapath so that it is once again able to express the specified behavior.

A prescriptive formal model for data-path hardware

The authors present a formal representation for register-level digital designs. The formalism is expressed in term of three models of a design, the data-flow structure, and timing models, and by bindings that express the interrelationships of the three models. The authors describe the desiderata that led to the particular choice of representation: a uniform representation for specification and implementation, the ability to express detailed implementation constraints, formality, descriptiveness, ease of testing, ease of encoding, executability, and prescriptiveness. They then describe related work and describe the representation and correctness constraints. Formal semantics for the representation are given, and a brief overview of a system that implements them is presented. >

Datapath optimization using feedback

Describes recent experience with Fasolt, a software tool that automatically optimizes a register-level datapath. Fasolt uses a model of layout to drive the choice of optimizing transformations at the levels of scheduling and allocation; hence it is a feedback-driven optimization system. In choosing transformations, Fasolt takes placement and wiring into account in a way that has not been demonstrated in any other high-level synthesis system. Fasolt is also cyclic in that high-level transformations trigger changes at lower levels, which after analysis trigger further high-level changes. This implementation of Fasolt has an expanded set of transformation rules, timing-driven and area-driven transformations, and improved layout modeling capability. The authors present experimental results on three basic test cases and two major variations on the layout software.<<ETX>>

On the existence, uniqueness and stability of spatial equilibrium in an open city with externalities

Abstract This paper deals with the existence, uniqueness and stability of a spatial equilibrium in an open city with external diseconomies like air pollution generated by manufacturing activities. First, assuming that both production functions and utility functions are Cobb-Douglas, we prove the existence of a spatial equilibrium under some reasonable assumptions. It is shown, however, that the uniqueness and stability of the equilibrium may not be obtained, unless the degree of externality is sufficiently small. In fact, none of the equilibria will be stable for a certain set of speeds of adjustment in the labor market and the land market, if the degree of externality is relatively large. Finally, some implications of our results are derived in regard to the application of the hedonic price concept within the context of a spatial equilibrium model.

Encoding multiple outputs for improved column compaction

The authors introduce EP1, a new encoding problem where the objective is to find an encoding so that the binary logic function has a minimal number of outputs after column compaction. Whereas state assignment is restricted to functions which have only one multiple-valued output variable (the next state variable), EP1 is important for functions which have many multiple-valued output variables, for example, control stores and other components of finite state machines which often occupy large fractions of the total chip area. This is particularly useful in high-level synthesis, where datapath components can often be reallocated or resynthesized to accept arbitrary or near-arbitrary control codes. A heuristic solution to EP1 is given, and experimental results are provided.<<ETX>>