David W Parent

The influence of personality and ability on undergraduate teamwork and team performance

The ability to work effectively on a team is highly valued by employers, and collaboration among students can lead to intrinsic motivation, increased persistence, and greater transferability of skills. Moreover, innovation often arises from multidisciplinary teamwork. The influence of personality and ability on undergraduate teamwork and performance is not comprehensively understood. An investigation was undertaken to explore correlations between team outcomes, personality measures and ability in an undergraduate population. Team outcomes included various self-, peer- and instructor ratings of skills, performance, and experience. Personality measures and ability involved the Five-Factor Model personality traits and GPA. Personality, GPA, and teamwork survey data, as well as instructor evaluations were collected from upper division team project courses in engineering, business, political science, and industrial design at a large public university. Characteristics of a multidisciplinary student team project were briefly examined. Personality, in terms of extraversion scores, was positively correlated with instructors’ assessment of team performance in terms of oral and written presentation scores, which is consistent with prior research. Other correlations to instructor-, students’ self- and peer-ratings were revealed and merit further study. The findings in this study can be used to understand important influences on successful teamwork, teamwork instruction and intervention and to understand the design of effective curricula in this area moving forward.

Teaching design of experiments and statistical analysis of data through laboratory experiments

A new laboratory course at San Jose State University, Advanced Thin Film Processes, integrates fabrication of thin films with design of experiment and statistical analysis of data. In the laboratory section of this course, students work through six multi-week modules that increase in the complexity of design of experiment and statistical analysis of data. The six modules have been developed with a standard format that includes learning objectives, background on the specific thin film process, theory of design of experiment principles, instructor notes, dry lab exercises, experimental plan worksheets, and assessment tools. While the modules were developed for a semiconductor processing class, they can easily be implemented in other engineering classes. The modules have been developed with a robust framework that allows the instructor to teach design of experiments and statistical analysis of data along with the specific engineering principles related to their class.

Photoassisted MOVPE grown (n)ZnSe/(p+)GaAs heterojunction solar cells

We report the electrical characteristics of (n)ZnSe/(p þ )GaAs heterostructure solar cells grown by depositing an n-type ZnSe epilayer using photoassisted metal organic vapor phase epitaxy on p þ type GaAs (1 0 0) substrates. A study of the solar cell efficiency as a function of ZnSe epilayer thickness is also presented. Our preliminary results show that an epilayer thickness of 1.5 lm produced the highest efficiency for the cells tested, (4.27% under AM1.5 conditions, no anti-reflective coating). We also demonstrate a method to pattern ZnSe/GaAs structures with an inexpensive methanol/ bromine etch process. 2003 Elsevier Science Ltd. All rights reserved.

Microelectronics process engineering program at SJSU

At present, there is a need for engineers with CMOS processing knowledge, statistical process control (SPC) skills, and the ability to work in an interdisciplinary team environment and assume leadership roles. San Jose State University are developing an interdisciplinary lab-based microelectronics process engineering program that introduces SPC and DOE to students in a microelectronics manufacturing environment. At the heart of the program are three courses, each of which is imagined to be a division of a fictitious semiconductor fabrication company (Spartan Semiconductor Services, Inc., or S3i). The divisions are: Digital NMOS division (MatE/EE129: Introduction to IC Fabrication), Thin Film Research Division (MatE/ChE 166: Advanced Thin Film Processes) and CMOS Division and SPC task force (MatE/EE 167: Microelectronics Manufacturing Methods). Several unique features of the program are its introduction of SPC in a microelectronics manufacturing environment, the inclusion of design of experiments (DOE) topics, and the faculty-faculty, faculty-student and student-student interaction among the three courses (divisions). Ultimately, we are trying to provide a learning environment that will allow our students to be immediately productive in an IC production facility, to be able to communicate with IC process engineers, and to be prepared for graduate school programs.

Microelectronics Process Engineering: A Non-Traditional Approach to MS&E

Materials Science and Engineering straddles the fence between engineering and science. In order to produce more work-ready undergraduates, we offer a new interdisciplinary program to educate materials engineers with a particular emphasis on microelectronics-related manufacturing. The bachelors level curriculum in Microelectronics Process Engineering (μProE) is interdisciplinary, drawing from materials, chemical, electrical and industrial engineering programs and tied together with courses, internships and projects which integrate thin film processing with manufacturing control methods. Our graduates are prepared for entry level engineering jobs that require knowledge and experience in microelectronics-type fabrication and statistics applications in manufacturing engineering. They also go on to graduate programs in materials science and engineering. The program objectives were defined using extensive input from industry and alumni. We market our program as part of workforce development for Silicon Valley and have won significant support from local industry as well as federal sources. We plan to offer a vertical slice of workforce development, from lower division engineering and community college activities to industry short courses. We also encourage all engineering majors to take electives in our program. All our course and program development efforts rely on clearly defined learning objectives.

Hafnium transistor design for neural interfacing

A design methodology is presented that uses the EKV model and the gm/ID biasing technique to design hafnium oxide field effect transistors that are suitable for neural recording circuitry. The DC gain of a common source amplifier is correlated to the structural properties of a Field Effect Transistor (FET) and a Metal Insulator Semiconductor (MIS) capacitor. This approach allows a transistor designer to use a design flow that starts with simple and intuitive 1-D equations for gain that can be verified in 1-D MIS capacitor TCAD simulations, before final TCAD process verification of transistor properties. The DC gain of a common source amplifier is optimized by using fast 1-D simulations and using slower, complex 2-D simulations only for verification. The 1-D equations are used to show that the increased dielectric constant of hafnium oxide allows a higher DC gain for a given oxide thickness. An additional benefit is that the MIS capacitor can be employed to test additional performance parameters important to an open gate transistor such as dielectric stability and ionic penetration.

Introducing TCAD Tools in a Graduate Level Device Physics Course

The impact that project complexity, student prior academic achievement, and quality of instructional materials might have on student academic achievement was studied during a required device physics course, in which technology computer-aided design (TCAD) tools were introduced to first-year graduate students. Preliminary analysis of student performance and project complexity showed that students who attempted the most complex projects had the lowest student academic achievement, despite there being no significant differences in prior academic achievement as measured by grades in the first exam in the course. Further analysis of student achievement data from other electrical engineering courses taught in a similar open laboratory format, for which enhanced instructional materials were developed, suggest that when well-developed learning resources are easily accessible to students, project complexity has no negative impact on student academic achievement and can sometimes enhance student academic performance. Cognitive load theory was used to explain why well-developed instructional tools, such as enhanced tutorials, can help students better learn or work with complex material.

Compact digital implementation of a quadratic integrate-and-fire neuron

A compact fixed-point digital implementation of a quadratic integrate-and-fire (QIF) neural model was developed. Equations were derived to determine the minimum number of bits the digital QIF model requires to represent all four states of the QIF model and control the switching threshold of the output voltage. In addition, the equations were used to minimize the size of the multiplier used for the nonlinear squaring function, V2. These design equations were used to develop test vectors that could unambiguously show all four states of a digital QIF model. The FPGA implementation of the QIF model was shown to be computationally efficient, requiring only two fixed-point adders and one fixed-point multiplier.

An analog circuit implementation of a quadratic integrate and fire neuron

Silicon neurons are of importance both to implement hybrid electronic-biological system as well as to develop fundamental understanding of the neurobiological systems they emulate. We have implemented a hardware version of the quadratic integrate and fire neural model. The quadratic integrate and fire neuron differs from the more common integrate and fire neuron in that the model, and thus the hardware, intrinsically generate spikes. Readily available discrete surface mount components are used to make the hardware available to a wider audience and facilitate experimentation.

A Course for Designing Transistors for High Gain Analog Applications

A laboratory based course for Electrical Engineering Masters students that teaches students how to design a process flow for metal oxide semiconductor field effect transistors (MOSFETs) that are optimized a high DC gain is presented. This course was developed, because while much of analog circuit design has to use processes that are optimized for high speed digital operation, there still exists design space for transistors that are optimized for analog operation in the low frequency domain. An example of this design space would be circuits that interface with neurons.