Dawid Zydek

A Survey of High Level Synthesis Languages, Tools, and Compilers for Reconfigurable High Performance Computing

High Level Languages (HLLs) make programming easier and more efficient; therefore, powerful applications can be written, modified, and debugged easily. Nowadays, applications can be divided into parallel tasks and run on different processing elements, such as CPUs, GPUs, or FPGAs; for achieving higher performance. However, in the case of FPGAs, generating hardware modules automatically from high level representation is one of the major research activities in the last few years. Current research focuses on designing programming platforms that allow parallel applications to be run on different platforms, including FPGA. In this paper, a survey of HLLs, tools, and compilers used for translating high level representation to hardware description language is presented. Technical analysis of such tools and compilers is discussed as well.

Accelerating High Performance Computing Applications: Using CPUs, GPUs, Hybrid CPU/GPU, and FPGAs

Most modern scientific research requires significant advanced modeling, simulation, and visualization. Due to the growing complexity of physical models, these research activities increasingly are requiring more and more High Performance Computing (HPC) resources and this trend is predicted to grow even stronger. Considering this growth in HPC applications, the traditional parallel computing model based solely on Central Processing Units (CPUs) is unable to meet the scientific needs of the researchers. HPC requirements are expected to reach exascale in this decade. There are several approaches to enhance and speed up HPC, some of the most promising involve hybrid solutions. In this paper, we describe existing state of hardware and accelerators for HPC. Such components include CPUs, Graphics Processing Units (GPU), and Field-Programmable Gate Arrays (FPGAs). Various hybrid implementations of these accelerators are presented and compared. Examples of the top supercomputers are included as well, together with their hardware configurations. Concluding this paper, we discuss our prediction of further HPC hardware trends in support of advanced modeling, simulation, and visualization.

Progress in Systems Engineering

This collection of proceedings from the International Conference on Systems Engineering, Las Vegas, 2014 is orientated toward systems engineering, including topics like aero-space, power systems, industrial automation and robotics, systems theory, control theory, artificial intelligence, signal processing, decision support, pattern recognition and machine learning, information and communication technologies, image processing, and computer vision as well as its applications. The volumes main focus is on models, algorithms, and software tools that facilitate efficient and convenient utilization of modern achievements in systems engineering.

Modeling computational limitations in H-Phy and Overlay-NoC architectures

High performance computing demands constant growth in computational power and services that can be offered by modern supercomputers. It requires technological and designing advances in the multiprocessor internal structures as well as novel computing models considering the very high computing demands. One of the increasingly important requirements of computing platforms is a functionality that allows efficient managing computational resources, i.e., monitor them, restrict an access to some part of the resources, account for computational service, or ensure reliability and quality of service when some resources are broken or disabled. In this paper, we present a new model describing computational limitations for processing tasks on multiprocessor systems. The model is implemented in Hardware-Physical (H-Phy) and Overlay-Network-on-Chip (Overlay-NoC) architectures. Both architectures and the model are described and analyzed. Experimentation system is also presented, together with simulation assumptions, results of research and their study. The paper provides complete models of H-Phy and Overlay-NoC structures with an ability to restrict processing resources.

Control System Design Based on Modern Embedded Systems

The functionality and complexity of real-world engineering control systems is increasing significantly due to continuous growth in requirements and their details. Since this trend is predicted to grow even stronger, the old control solutions will be becoming less and less efficient. There are several approaches to designing modern control systems that meet the current and future needs. In this paper, we focus on one of the promising ways to control engineering: Embedded Systems. We describe categories of embedded systems and an engineering approach to control systems design based on the embedded systems. All related challenges are presented considering weaknesses of traditional systems. For the described embedded control system, a design methodology is given as well. Our discussion focuses on approach based on Field-Programmable Gate Array (FPGA) as a solution with huge potential. Finally, we share our thoughts on further trends in modern embedded control systems.

Overlay-NoC and H-Phy based computing using modern Chip Multiprocessors

Constant growth in demand for computational power requires advances in the internal mechanisms of multiprocessor computing structures. Such architectures may include many (sometimes, even millions of) processors performing processing tasks. Each technique that increases efficiency leads to significant benefits in operational energy and task execution time. Due the scale of multiprocessor computing structures, the importance of achieving faster and efficient systems is invaluable. In this paper, we present two different approaches for processing tasks on multiprocessor architectures: Hardware-Physical (H-Phy) and Overlay-Network-on-Chip (Overlay-NoC). Both methods are described and compared. We also present the research plan, models, simulation assumptions, and results of research. The paper is summarized with conclusions and future work plan.

Active Learning based on Random Forest and Its Application to Terrain Classification

In this paper, a novel active learning technique was proposed for solving multiclass classification problem with random forest classifier. By combining uncertainty, density, and diversity criteria, the most informative samples are selected for manually labeling. The uncertainty criterion is implemented by analyzing the difference between the most votes and second most votes from classifier’s output. Samples in dense regions are thought to be more informative than samples in sparse regions. The average distance of a sample to its k-nearest unlabeled neighbors is computed to describe the sample’s density. The distance between a sample and its nearest labeled sample is used to measure the diversity of the sample. The larger the distance is, the less redundancy the sample is. To assess the effectiveness of the proposed method, it was compared with other techniques like traditional active learning based on random forest and SVM. The results of the experiment on terrain classification have demonstrated the effectiveness of the proposed approach.

Nonlinear Position Control of DC Motor Using Finite-Horizon State Dependent Riccati Equation

DC motors are often used for accurate positioning in industrial machines. Precise equations describing DC motors are nonlinear. Accurate nonlinear control of the motion of the DC motors is required. In this paper, an online technique for finite-horizon nonlinear tracking problems is presented. The idea of the proposed technique is the change of variables that converts the nonlinear differential Riccati equation to a linear Lyapunov differential equation. The proposed technique is effective for wide range of operating points. Simulation results for a realistic DC motor are given to illustrate the effectiveness of the proposed technique.

Matrix Multiplication in Multiphysics Systems Using CUDA

Multiphysics systems are used to simulate various physics phenomena given by Partial Differential Equations (PDEs). The most popular method of solving PDEs is Finite Element method. The simulations require large amount of computational power, that is mostly caused by extensive processing of matrices. The high computational requirements have led recently to parallelization of algorithms and to utilization of Graphic Processing Units (GPUs). To take advantage of GPUs, one of GPU programming models has to be used. In this paper, CUDA model developed by nVidia is used to implement two parallel matrix multiplication algorithms. To evaluate the effectiveness of these algorithms, several experiments have been performed. Results have been compared with results obtained by classic Central Processing Unit (CPU) matrix multiplication algorithm. The comparison shows that matrix multiplication on GPU significantly outperforms classic CPU approach.

Solving PDEs in modern multiphysics simulation software

Needs and expectations of nowadays science require not only precise description of certain natural and physics phenomena, but also a capability to model and predict their future state. There are many physics and mathematical models already created and described, some of them are developed many years ago; however, solving the models remains a challenge till date. Due to research advances in computer science field, the challenge can be faced using modern software tools, called multiphysics simulators. In this paper, three systems using finite element method are presented. Structure, concept of solving problems, capacity, performance, and weak and strong sides of these systems are described and discussed. Goal of the analysis is to find bottlenecks in the systems. These bottlenecks are caused by limitations of hardware used, which can be overcome using other technologies. We propose Graphic Processing Units (GPUs) and Field-Programmable Gate Arrays (FPGAs) as the solutions significantly increasing performance of multiphysics simulators.