Dennis Willie

Drop test reliability of lead-free chip scale packages

This paper presents the drop test reliability of 0.5 mm pitch lead-free chip scale packages (CSPs). Fifteen 0.5 mm pitch CSPs were assembled on a standard JEDEC drop reliability test board with Sn3.0Ag0.5Cu lead-free solder. Eight boards were edge-bonded with a UV-cured acrylic; eight boards were edge- bonded with a thermal-cured epoxy; and twelve boards were assembled without edge bonding. Half of the edge-bonded test boards were subjected to drop tests at a peak acceleration of 1500 G with a pulse duration of 0.5 ms, and the other half subjected to drop tests at a peak acceleration of 2900 G with a pulse duration of 0.3 ms. Half of the test boards without edge bonding were subjected to drop tests at a peak acceleration of 900 G with a pulse duration of 0.7 ms, and the other half subjected to drop tests at a peak acceleration of 1500 G with a pulse duration of 0.5 ms. Two drop test failure detection systems were used in this study to monitor the failure of solder joints: a high-speed resistance measurement system and a post-drop static resistance measurement system. The high-speed resistance measurement system, which has a scan frequency of 50 KHz and a 16-bit signal width, is able to detect intermittent failures during the short drop impact duration. Statistics of the number of drops to failure for the 15 component locations on each test board are reported. The effect of component position on drop test reliability is discussed. The test results show that the drop test performance of edge-bonded CSPs is five to eight times better than the CSPs without edge bonding. However, the drop test reliability of edge-bonded CSPs with the thermal-cured epoxy is different from that with edge-bonded CSPs with the UV-cured acrylic. The solder crack location and crack area are characterized with the dye penetrant method. The fracture surfaces are studied using scanning electron microscopy (SEM).

Effects of reflow profile and thermal conditioning on intermetallic compound thickness for SnAgCu soldered joints

Purpose – The purpose of this paper is to investigate the effects of reflow time, reflow peak temperature, thermal shock and thermal aging on the intermetallic compound (IMC) thickness for Sn3.0Ag0.5Cu (SAC305) soldered joints.Design/methodology/approach – A four‐factor factorial design with three replications is selected in the experiment. The input variables are the peak temperature, the duration of time above solder liquidus temperature (TAL), solder alloy and thermal shock. The peak temperature has three levels, 12, 22 and 32°C above solder liquidus temperatures (or 230, 240 and 250°C for SAC305 and 195, 205, and 215°C for SnPb). The TAL has two levels, 30 and 90 s. The thermally shocked test vehicles are subjected to air‐to‐air thermal shock conditioning from −40 to 125°C with 30 min dwell times (or 1 h/cycle) for 500 cycles. Samples both from the initial time zero and after thermal shock are cross‐sectioned. The IMC thickness is measured using scanning electron microscopy. Statistical analyses are c...

Drop impact reliability of edge-bonded lead-free chip scale packages

This paper presents the drop test reliability results for edge-bonded 0.5 mm pitch lead-free chip scale packages (CSPs) on a standard JEDEC drop reliability test board. The test boards were subjected to drop tests at several impact pulses, including a peak acceleration of 900 Gs with a pulse duration of 0.7 ms, a peak acceleration of 1500 Gs with a pulse duration of 0.5 ms, and a peak acceleration of 2900 Gs with a pulse duration of 0.3 ms. A high-speed dynamic resistance measurement system was used to monitor the failure of the solder joints. Two edge-bond materials used in this study were a UV-cured acrylic and a thermal-cured epoxy material. Tests were conducted on CSPs with edge-bond materials and CSPs without edge bonding. Statistics of the number of drops-to-failure for the 15 component locations on each test board are reported. The test results show that the drop test performance of edge-bonded CSPs is five to eight times better than the CSPs without edge bonding. Failure analysis was performed using dye-penetrant and scanning electron microscopy (SEM) methods. The most common failure mode observed is pad lift causing trace breakage. Solder crack and pad lift failure locations are characterized with the dye-penetrant method and optical microscopy.