DerChang Kau

A stackable cross point Phase Change Memory

A novel scalable and stackable nonvolatile memory technology suitable for building fast and dense memory devices is discussed. The memory cell is built by layering a storage element and a selector. The storage element is a Phase Change Memory (PCM) cell [1] and the selector is an Ovonic Threshold Switch (OTS) [2]. The vertically integrated memory cell of one PCM and one OTS (PCMS) is embedded in a true cross point array. Arrays are stacked on top of CMOS circuits for decoding, sensing and logic functions. A RESET speed of 9 nsec and endurance of 106 cycles are achieved. One volt of dynamic range delineating SET vs. RESET is also demonstrated.

The Role of Interfaces in Damascene Phase-Change Memory

Phase change memory (PCM) research has largely focused on bulk properties to evaluate cell efficiency. Now both electrical and thermal interface resistances are characterized and shown to be critical for understanding power in a novel damascene-GST cell. Interfaces reduce reset power 20% and reset current 40% and allow reset current to scale faster than it would without interfaces.

Phase Change Memory with Chalcogenide Selector (PCMS): Characteristic Behaviors, Physical Models and Key Material Properties

We present a novel scalable and stackable nonvolatile solid state memory. Each cell consists of a storage element, based on phase change memory (PCM) element, and an integrated selector, using an Ovonic threshold switch (OTS). The cell is implemented to enable a true cross-point array. The main device characteristics and behaviors, corresponding physical processes in different operation modes, and key material properties are discussed.

Temporal Changes of Parameters in Phase Change Memory

We have presented the data showing the drift of PCM parameters over a broad range of times. We have proposed a simple analytical model to explain our observations through inherent structural relaxations in a glass and described by the double well potential concept that predicts the temporal and saturation dependencies of drift phenomena. Our model correctly describes the observed drift including the numerical values of parameters.

Phase change memory parameters: Effects of atomic transformations

We discuss key PCM device parameters and their variations. In particular, we show how effects of atomic transformations result in unique device behaviors such as delay time, temporal changes of parameters, under-threshold and others. Concepts of nucleation switching, atomic double well potential and disordered glass structure are introduced to explain experimental data collected.