Dieison Silveira

A lossless approach for external memory bandwidth reduction in video coding systems and its VLSI architecture

This paper presents the Reference Frame Context Adaptive Variable-Length Coder (RFCAVLC), which is a lossless solution to external memory bandwidth reduction in current video coding systems. The proposed approach is based on an adaptation of the traditional Huffman algorithm, and it uses eight static tables to avoid the cost of the on-the-fly statistical analysis. The best table to encode a block is defined using a context evaluation, resulting in a context-adaptive configuration. The use of RFCAVLC reached an average compression rate higher than 31% for the evaluated video sequences. The architectures that implement the RFCAVLC encoder and decoder were designed and synthesized to an FPGA device. The RFCAVLC design is able to reach real-time encoding for WQSXGA (3200 × 2048 pixels) at 30 fps. The synthesis results show that this solution can be easily coupled to a complete video encoder system with negligible hardware overhead and without compromising the throughput for real-time high-definition multimedia applications.

A Memory Energy Consumption Analysis of Motion Estimation Algorithms using Data Reuse in Video Coding Systems

The number of accesses Motion Estimation requires to write and read large amount of data from external memory is the major issue in video coding systems, since, besides being the performance bottleneck of these systems, it impacts directly on the energy consumption. To attenuate this problem, there are solutions that involve data reuse strategies using on-chip SRAM memories. The main advantage of these solutions is the fact that they can achieve high external memory bandwidth reduction on reading operations. This paper presents an evaluation of the impact of the memory accesses and energy consumption considering a Level C+ data reuse scheme for four different fast algorithms and the Full Search algorithm. Our results show that the energy consumption for the traditional method, when no memory bandwidth reduction strategy is used, becomes impractical for most of the considered Motion Estimation algorithms. However, when the data reuse scheme Level C+ is used, the energy consumption related to the memory suffers a great reduction, making it possible for fast algorithms to be used in real-time video coding systems. The reduction reached is up to 97% when considering fast Motion Estimation algorithms.

A new differential and lossless Reference Frame Variable-Length Coder: An approach for high definition video coders

This paper presents a novel solution for external memory bandwidth reduction in video coding systems. The approach is based on reference frame compression, using a differential coding and a hardware-aware adaptation of the traditional Huffman algorithm, besides, it is a lossless solution fully compliant to state-of-art video coding standards, as H.264/AVC and HEVC. This solution is called DRFVLC (Differential Reference Frame Variable-Length Coder) and it uses differential coding to concentrate the samples values distribution. With the samples concentrated, an efficient static Huffman coding is applied to represent them in fewer bits. The DRFVLC reaches an average compression rate higher than 60% for the evaluated HD 1080p video sequences. This compression rate also indicates the external memory bandwidth reduction achieved with our technique. This solution can be easily implemented in hardware demanding one differentiator and a simple variable-length coder.

An efficient reference frame compression approach for video coding systems

This paper presents an efficient solution for external memory bandwidth reduction focusing in the state-of-art video coding standards, like H.264/AVC and HEVC. The proposed approach is based in reference frame compression using a differential coding and a hardware-efficiently adaptation of the traditional Huffman algorithm, besides, it is a lossless solution and fully complied to state-of-art video coding standards. This solution is entitled DRFVLC (Differential Reference Frame Variable-Length Coder) and it applies an inter-block differential coding to concentrate the values near to zero, and also, it uses one static Huffman table to avoid the cost of the on-the-fly Huffman statistical analysis. The use of DRFVLC reached an average compression rate higher than 46% for the evaluated video sequences, with computational cost of a single differential coding and a VLC, which means the solution is not a bottleneck of the video coding system.

Memory bandwidth reduction for H.264 and HEVC encoders using lossless reference frame coding

This paper presents a hardware-efficient algorithm for external memory bandwidth reduction focusing on the state-of-the-art video encoders, like H.264/AVC and HEVC. The proposed approach is a lossless solution based on an adaptation of the traditional Huffman algorithm. This solution is entitled RFCAVLC8T (Reference Frame Context Adaptive Variable-Length Coder with 8 Tables) and is based on the use of off-line defined static Huffman tables. The RFCAVLC8T is a hardware-efficient version of the Huffman algorithm that employs eight static tables to avoid the cost of the on-the-fly Huffman statistical analysis. The best table to encode a block is selected at run time using a context evaluation, resulting in a context-adaptive configuration. The use of RFCAVLC8T reaches an average compression rate higher than 35% for the evaluated video sequences, with computational cost of a single VLC.

A low-complexity and lossless reference frame encoder algorithm for video coding

This paper presents a lossless coding solution to reduce the large overhead of external memory communication during the motion estimation process in current video coders. Our solution is called Differential Reference Frame Coder (DRFC), and uses two techniques together to compress the reference frame: a differential coding based on a simplified intra-prediction process to reduce the spatial redundancy of the reference samples, and a simple VLC applied to differential coding residues. The proposed solution reaches an average compression rate higher than 45% for the evaluated HD 1080p video sequences. This is a lossless and low-complexity solution, and could easily be implemented in hardware.

An energy-efficient hardware design for lossless reference frame compression in video coders

In current video coders many modules that compose the encoder need to write and to read a large amount of data from external memory. It requires a large memory bandwidth, with significant impact on energy consumption. In this context, this paper presents the hardware architectures of the Reference Frame Context Adaptive Variable-Length Compressor with 4 coding tables (RFCAVLC), which is a standard-free lossless solution for reducing external memory bandwidth. RFCAVLC reaches an average compression rate higher than 24% for the evaluated video sequences. The RFCAVLC hardware (Coder and Decoder) was described in VHDL and synthesized targeting ASIC for 45nm, 65nm, and 90nm TSMC standard cell libraries. The results show that with 45nm, 65nm, and 90nm, the RFCAVLC is able to process up to 83, 69, and 42 QFHD frames per second, respectively. To attend real-time processing for QFHD@30 frames per second our design consumes 23.4 pJ/sample for 90 nm, 15.6 pJ/sample for 65 nm, and 7.1 pJ/sample for 45 nm.

System energy analysis for shared memory multiprocessing applications

This paper presents a detailed energy consumption analysis, considering the energy consumption related to CPU, cache memory and main memory of parallel applications on a 16-core HPC platform. The correlations between energy consumption, speedup, and execution time are also herein presented. Tests are conducted with the NAS parallel benchmarks using three different measurement tools: i) Perf, for the measurement of hardware cache memory events; ii) CACTI, used to estimate the cache memory energy consumption by access; and iii) PCM, for CPU and DRAM energy consumption estimates. Our results show that the lowest overall energy consumption occurs only when all physical cores are used, reducing by 62%, on average, the total system energy consumption when compared to the sequential version for the execution. Moreover, the cache memories results are even better, achieving a reduction of 80% in most of the cases, despite the increase in cache miss rate generated by the increased number of threads.

Performance and energy consumption analysis of the X265 video encoder

The ×265 video encoder aims at improving the speed and the computational efficiency of HEVC encoders implementation. In this paper we present a detailed energy consumption analysis, considering the consumption components of CPU, cache memories and main memory, for all ×265 presets executing in a multicore system. Ten HD 1080p test video sequences with different motion and brightness characteristics are used in the experiments. Three tools are used to obtain the results: CACTI, PCM and Perf. To get more reliable time/energy results, 10 executions were performed for each preset. The results show that fast presets are 47× faster than slower presets. However, slower presets use robust configurations and achieve large reductions in bitrate. Due to this, the ultrafast preset has a bitrate 45% higher than placebo preset. Furthermore, the system energy consumption increases 45×, from ultrafast preset to placebo preset. Our experiments clearly present the dependence between bitrate and energy consumption for all encoding presets, which allows us to choose the best bitrate/energy trade-off for each platform at hand.

Memory energy consumption analyzer for video encoder hardware architectures

The motion estimation stage requires high number of memory accesses, causing high-energy consumption in the video coding process. This results in lower battery lifetime on mobile devices. Thus, solutions to reduce the external memory bandwidth in video coding systems must be used. This work proposes a memory energy consumption analyzer, which estimates the energy consumption related to memory accesses of video encoder systems. This analyzer enables the evaluation of different schemes with data reuse, reference frame compression and memory hierarchy, which are the most used techniques for memory bandwidth reduction and its associated energy consumption. This analyzer is implemented in SystemC, which allows system modeling in a simple and fast way. As a case study of the tool, the developed analyzer was used to evaluate a solution joining a reference frame compressor and a Level C data reuse scheme. The energy consumption results of the evaluated scheme present reduction on both write and read memory operations, reaching a total memory energy consumption reduction of 97.91% when compared to original video encoder without any technique for memory access reduction.