Dina El-Damak

An 8-Channel Scalable EEG Acquisition SoC With Patient-Specific Seizure Classification and Recording Processor

An 8-channel scalable EEG acquisition SoC is presented to continuously detect and record patient-specific seizure onset activities from scalp EEG. The SoC integrates 8 high-dynamic range Analog Front-End (AFE) channels, a machine-learning seizure classification processor and a 64 KB SRAM. The classification processor exploits the Distributed Quad-LUT filter architecture to minimize the area while also minimizing the overhead in power × delay . The AFE employs a Chopper-Stabilized Capacitive Coupled Instrumentation Amplifier to show NEF of 5.1 and noise RTI of 0.91 μVrms for 0.5-100 Hz bandwidth. The classification processor adopts a support-vector machine as a classifier, with a GBW controller that gives real-time gain and bandwidth feedback to AFE to maintain accuracy. The SoC is verified with the Childrens Hospital Boston-MIT EEG database as well as with rapid eye blink pattern detection test. The SoC is implemented in 0.18 μm 1P6M CMOS process occupying 25 mm2, and it shows an accuracy of 84.4% in eye blink classification test, at 2.03 μJ/classification energy efficiency. The 64 KB on chip memory can store up to 120 seconds of raw EEG data.

A 93% efficiency reconfigurable switched-capacitor DC-DC converter using on-chip ferroelectric capacitors

Dynamic Voltage Scaling (DVS) has become one of the standard techniques for energy efficient operation of systems by powering circuit blocks at the minimum voltage that meets the desired performance [1]. Switched Capacitor (SC) DC-DC converters have gained significant interest as a promising candidate for an integrated energy conversion solution that eliminates the need for inductors [2,3]. However, SC converters efficiency is limited by the conduction loss, bottom plate parasitic capacitance, gate drive loss in addition to the overhead of the control circuit. Reconfigurable SC converters supporting multi-gain settings have been proposed to allow efficient operation across wide output range [2,4]. Also, High density deep trench capacitors with low bottom plate parasitic capacitance have been utilized in [5] achieving a peak efficiency of 90%. In this work, we exploit on-chip ferroelectric capacitors (Fe-Caps) for charge transfer owing to their high density and extremely low bottom plate parasitic capacitance [6]. High efficiency conversion is achieved by combining the Fe-Caps with multi-gain setting converter in a reconfigurable architecture with dynamic gain selection.

An 8-channel scalable EEG acquisition SoC with fully integrated patient-specific seizure classification and recording processor

Tracking seizure activity to determine proper medication requires a small form factor, ultra-low power sensor with continuous EEG classification. Technical challenges arise from: 1) patient-to-patient variation of seizure pattern on EEG, 2) fully integrating an ultra-low power variable dynamic range instrumentation circuits with seizure detection processor, and 3) reducing communication overhead. Reference [1] extracted EEG features locally on-chip to reduce the data being transmitted, and saved power by 1/14 when compared to raw EEG data transmission. However, it still needs data transmission and off-chip classification to detect and to store seizure activity. This paper presents an ultra-low power scalable EEG acquisition SoC for continuous seizure detection and recording with fully integrated patient-specific Support Vector Machine (SVM)-based classification processor.

A 10 nW–1

This paper presents a 10 nW-1 μW power management IC with 3.2 nW quiescent power consumption for solar energy harvesting applications. The chip integrates a switch matrix that can be configured as a buck or a boost dc-dc converter using a single inductor as well as output voltage regulation logic, battery management block, and self-startup. The control circuit of the converter is designed in an asynchronous fashion that scales the effective switching frequency of the converter with the level of power transferred. The on-time of the converter switches adapts dynamically to the input and output voltages for peak-current control and zero-current switching. For input power of 500 nW, the proposed chip achieves an efficiency of 82%, including the control circuit overhead, while charging the energy storage device at 3 V from 0.5 V input. In buck mode, it achieves a peak efficiency of 87% and maintains efficiency greater than 80% for output power of 50 nW-1 μW with input voltage of 3 V and output voltage of 1 V.

\upmu {\rm{W}}

2D nanoelectronics based on single-layer (SL) MoS2 offers great advantages for ubiquitous electronics. With new device technology, highly uniform E-mode FETs using SL CVD MoS2 with positive VT, large mobility, excellent subthreshold swing are achieved. The integrated inverter shows excellent voltage transfer characteristic, close to rail-to-rail operation, high noise margin, large voltage gain (~45) and small static power. The combinational and sequential digital circuits shown here serve as a toolbox of building blocks for realizing wide range of digital circuitry.

Power Management IC With Integrated Battery Management and Self-Startup for Energy Harvesting Applications

This paper presents a 3.2nW quiescent power solar energy harvesting system. The control circuit is designed in an asynchronous fashion that scales the effective switching frequency of the converter with the level of the power transferred. The on-time of the converter switches adapts dynamically to the input and output voltages for peak-current control and zero-current switching. The chip integrates self-startup, battery management, supplies 1V regulated rail with single inductor and supports power range of 10nW to 1μW. For input power of 500nW, the proposed system achieves an efficiency of 82%, including the control circuit overhead, while charging a battery at 3V from 0.5V input. In buck mode, it achieves a peak efficiency of 87% and maintains efficiency greater than 80% for output power of 50nW-1μW with input voltage of 3V and output voltage of 1V.

Enhancement-mode single-layer CVD MoS2 FET technology for digital electronics

We present a state-of-the-art fabrication technology and physics-based model for molybdenum disulfide (MoS2) field effect transistors (FETs) to realize large-scale circuits. Uniform and large area chemical vapor deposition (CVD) growth of monolayer MoS2 was achieved by using perylene-3,4,9, 10-tetracarboxylic acid tetrapotassium salt (PTAS) seeding. Then, a gate first process results in enhancement mode FETs and also reduces performance variation and enables better process control. In addition, a Verilog-A compact model precisely predicts the performance of the fabricated MoS2 FETs and eases the large-scale integrated design. By using this technology, a switched capacitor DC-DC converter is implemented, and the measurement of the converter shows good agreement with the simulations.

Solar energy harvesting system with integrated battery management and startup using single inductor and 3.2nW quiescent power

Two-dimensional electronics based on single-layer (SL) MoS2 offers significant advantages for realizing large-scale flexible systems owing to the ultrathin nature, good transport properties and stable crystalline structure of MoS2. However, the reported devices and circuits based on this material have low yield because of various variation sources inherent to the growth and fabrication technology. In this work, we develop a variation-aware design flow and yield model to evaluate the MoS2 technology and provide a guideline for the co-optimization of the material, devices and circuits. Test chips with various inverters and basic logic gates (such as NAND and XOR) are fabricated as demonstration of the close-to-unit yield of the proposed technology platform.

MoS 2 FET fabrication and modeling for large-scale flexible electronics

Thermal energy harvesting systems use boost converters for high-efficiency low voltage operation, but lack the ability for low voltage startup without off-chip transformers. We present a cold start system that uses integrated magnetics instead of external transformers in a Meissner Oscillator to start up from ultra low voltages, with a switched capacitor DC-DC circuit for additional voltage gain. The oscillator analysis with on-chip magnetics allows device co-optimization for low voltage operation, despite 1000x lower inductance values than off-chip transformers. Co-optimized on-chip transformer and depletion-mode NMOS start up from 25 mV driven directly by a sourcemeter, or 50 mV with a 4.7 Ω series resistance, for the lowest integrated electrical startup. The co-packaged system provides proof of concept for integration with boost converter circuits on a single die to have a fully-integrated low voltage startup solution for thermal energy harvesting applications, without using off-chip transformers.