Dinesh Prasad

New Single VDCC-based Explicit Current- Mode SRCO Employing All Grounded Passive Components

This paper proposes a new single resistance controlled sinusoidal oscillator (SRCO) which employs only one voltage differencing current conveyor (VDCC), two grounded resistors and two grounded capacitors. The presented circuit configuration offers the following advantageous features (i) explicit current-mode output with independent control of condition of oscillation (CO) and frequency of oscillation (FO) (ii) low active and passive sensitivities and (iii) a very good frequency stability. The proposed structure can also be configured as (a) trans-admittance low pass filter and band pass filter and (b) quadrature oscillator. The validity of the proposed SRCO, quadrature oscillator and trans-admittance low pass filter and band pass filter has been verified by PSPICE simulations using TSMC CMOS 0.18μm process model parameters.

New parallel R-L impedance using single VDTA & its high pass filter application

A new parallel resistor-inductor (R-L) impedance simulation circuit has been proposed. The presented configuration employs only one Voltage Differencing Transconductance Amplifier (VDTA) and one grounded capacitor. The workability of new presented R-L impedance circuit is verified by SPICE simulations with 0.18μm CMOS process parameters.

Novel VDCC based low-pass and high-pass Ladder filters

This paper presents 5th order Low-Pass (LP) and High-Pass (HP) Ladder filters employing two Voltage Differencing Current Conveyors (VDCCs), four resistors and five capacitors. The workability of the proposed circuits has been tested using SPICE simulations.

Transadmittance Type Universal Current-Mode Biquad Filter Using VDTAs

A new resistorless single-input-multi-output (SIMO) universal transadmittance (TA) type filter employing two voltage differencing transconductance amplifiers (VDTA) and two grounded capacitors is proposed. The proposed topology realizes simultaneously low pass (LP), high pass (HP), and band pass (BP) filter functions. Band rejects (BR) and all pass (AP) filters are also realizable through appropriate connections of currents. The proposed configuration also offers independent control of natural angular frequency (ω 0) and bandwidth (BW) and low active and passive sensitivities. The workability of proposed configuration has been demonstrated through PSPICE simulations with TSMC CMOS 0.18 μm process parameters.

Study of some Peak-to-Average Power Ratio reduction techniques in MIMO-OFDM system

Orthogonal frequency division multiplexing (OFDM) is a multicarrier modulation technique which utilizes the available spectrum in an efficient manner and provides high data rate transmission. Apart from this, OFDM is also considered to be a promising technique for power efficiency, multipath delay spread tolerance and robustness to the frequency selective fading channels. OFDM when used in combination with Multiple-input Multiple-output configuration increases the diversity gain and system capacity. This diversity is used to mitigate the impairments of wireless channels. With all these advantages, MIMO-OFDM has become the key technique for next generation WLAN and 4G mobile communications. It is used in IEEE 802.11n, IEEE 802.1 6m and LTE. However, MIMO-OFDM system faces the Peak-to-Average Power Ratio (PAPR) problem which results in many restrictions for practical applications. This paper reviews and analyzes some of the important PAPR reduction techniques on the basis of different parameters.

A Purely Active Circuit Simulator for Realizing Electronically Tunable Floating Resistance

This research article proposes a novel floating resistor simulation circuit with electronic control facility. Proposed simulator employs two voltage differencing transconductance amplifiers (VDTAs) only. The circuit structure of presented simulator is very simple and enjoys the following beneficial properties: (i) employment of only two active elements (VDTAs), (ii) no requirement of any external resistance so a purely active implementation, (iii) electronic control of realized resistance, (iv) no need to meet any active/passive element matching condition, (v) excellent behavior under non-ideal conditions, (vi) low values of sensitivity indexes, and (vii) full utilization of used active elements. The influence of VDTA terminal parasitics on high-frequency behavior of proposed circuit is also investigated. The working of presented circuit has been confirmed by designing a low-pass filter. To validate the behavior of realized circuits, simulations in PSPICE have been performed.

Low-Voltage Low-Power FGMOS-Based Current Conveyor III

A new realization of high-performance third-generation current conveyor (CCIII) is proposed in this paper. FGMOS technique is utilized to implement low-voltage CCIII. The inherited features of the proposed block are low supply-voltage, low-power dissipation, and high-output impedance at terminal Z. The circuit is simulated in SPICE using 0.13 µm CMOS technology.

Low voltage floating gate MOSFET based current differencing transconductance amplifier and its applications

This article presents a low voltage low power configuration of current differencing transconductance amplifier (CDTA) based on floating gate MOSFET. The proposed CDTA variant operates at lower supply voltage ±1.4 V with total static power dissipation of 2.60 mW due to the low voltage feature of floating gate MOSFET. High transconductance up to 6.21 mA/V is achieved with extended linear range of the circuit i.e. ±130 μA. Two applications are illustrated to demonstrate the effectiveness of the proposed active block. A quadrature oscillator is realized using FGMOS based CDTA, two capacitors, and a resistor. The resistor is implemented using two NMOSFETs to provide high linearity and tunablility. Another application is the Schmitt trigger circuit based on the proposed CDTA variant. All circuits are simulated by using SPICE and TSMC 130 nm technology.

Low Power Analog Computational Blocks Based On High Performance Floating Gate MOSFET Resistor

ABSTRACT This article proposes a new FGMOS-based programmable FGMOS resistor. A highly linear resistor is implemented by cancelling the non-term present in the drain current equation of MOSFET operating in the linear region. The inherited features of FGMOS resistor are simplicity, programmability, wider bandwidth and very low power dissipation without supply voltage. The power dissipation of the proposed FGMOS resistor is only 985 nW. Analogue computational blocks such as programmable reciprocal circuit, current to voltage converter and low-pass filter as applications of proposed programmable FGMOS resistor are also suggested. The power dissipation of reciprocal circuit and low-pass filter are 14.7 and 131 µW, respectively. To demonstrate the efficacy of the circuits, simulations are carried out using SPICE on 0.13 µm CMOS technology.

High-performance programmable grounded resistor and its applications

ABSTRACT Programmable resistor and analog computational circuits are essential for many applications such as analog signal processing units, automatic gain control, neural, fuzzy and instrumentation systems. A high-performance programmable grounded resistor (PGR) using complementary metal oxide semiconductor (CMOS) technology is proposed in this paper. A highly linear CMOS resistor with equivalent resistance ranging from 9.4 to 1.5 kΩ is obtained by cancelling the non-linear term present in the current equation of an MOSFET working in the linear region. The proposed resistor operates on both positive as well as negative input voltage. The inherited features of PGR are simplicity, extensive control voltage range, wider bandwidth and low-power dissipation. Additionally, analog computational units such as multiplier, squarer and divider are also discussed as applications of the PGR. All circuits are implemented and simulated using TSMC 0.13 µm CMOS technology in SPICE.