Dirk Utess
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Featured researches published by Dirk Utess.
Journal of Applied Physics | 2013
Thong Q. Ngo; Agham Posadas; Hosung Seo; Son Hoang; Martin D. McDaniel; Dirk Utess; Dina H. Triyoso; C. Buddie Mullins; Alexander A. Demkov; John G. Ekerdt
Cobalt oxide (CoO) films are grown epitaxially on Si(001) by atomic layer deposition (ALD) using a thin (1.6 nm) buffer layer of strontium titanate (STO) grown by molecular beam epitaxy. The ALD growth of CoO films is done at low temperature (170–180 °C), using cobalt bis(diisopropylacetamidinate) and water as co-reactants. Reflection high-energy electron diffraction, X-ray diffraction, and cross-sectional scanning transmission electron microscopy are performed to characterize the crystalline structure of the films. The CoO films are found to be crystalline as-deposited even at the low growth temperature with no evidence of Co diffusion into Si. The STO-buffered Si (001) is used as a template for ALD growth of relatively thicker epitaxial STO and TiO2 films. Epitaxial and polycrystalline CoO films are then grown by ALD on the STO and TiO2 layers, respectively, creating thin-film heterostructures for photoelectrochemical testing. Both types of heterostructures, CoO/STO/Si and CoO/TiO2/STO/Si, demonstrate water photooxidation activity under visible light illumination. In-situ X-ray photoelectron spectroscopy is used to measure the band alignment of the two heterojunctions, CoO/STO and CoO/TiO2. The experimental band alignment is compared to electronic structure calculations using density functional theory.
symposium on vlsi technology | 2014
Dina H. Triyoso; Sanford Chu; Konrad Seidel; Wenke Weinreich; Kok-Yong Yiang; Mark Gerard Nolan; David Paul Brunco; Jochen Rinderknecht; Dirk Utess; Carl Kyono; Rod Miller; Jeasung Park; Lili Cheng; Maik Liebau; Patrick Lomtscher; Robert Fox
As operating frequency and circuit density of VLSI systems continue to increase, the L*di/dt induced voltage fluctuations in the power grid increasingly becomes a source of voltage/timing problems. On-chip decoupling capacitors, placed in close proximity to the power grid conductors, can offset parasitic inductances and thereby reduce the high frequency noise. High capacitance density MIM capacitors, placed between the last two metal layers, have been shown to be effective in achieving on-chip decoupling in high performance processors. There have been many reports in the literature on the use of high-k material such as Ta2O5, HfO2, ZrO2 for MIM capacitors [1-5]. A large number of reports of high-k MIM are focused on DRAM rather than decoupling capacitors applications [2-4]. One important difference between the DRAM capacitor module and decoupling capacitors is the thermal budget requirement. DRAM capacitors allow a higher thermal budget (~700°C) compared to embedded decoupling capacitors which must meet the BEOL thermal budget requirement (~400°C). We have recently reported an improved reliability by addition of Al into ZrO2 [6]. In this work, we report detailed material, electrical and further reliability characterization of ZrO2-based MIM capacitor capable of meeting stringent reliability requirement while maintaining compatibility with the backend processing thermal budget. A capacitor with >20fF/μm2 capacitance density and leakage current density <;100nA/cm2 meeting lifetime target (operated on both polarities) is demonstrated.
international conference on ic design and technology | 2014
Dina H. Triyoso; W. Weinreich; K. Seidell; Mark Gerard Nolan; P. Polakowski; Dirk Utess; S. Ohsiek; K. Dittmar; M. Weisheit; M. Licbau; R. Fox
Decoupling MIM capacitors are typically implemented to reduce power supply noise. In this work we reported characterization of Atomic Layer Deposited (ALD) Ta<sub>2</sub>O<sub>5</sub> and Hf-doped Ta<sub>2</sub>O<sub>5</sub> high-k MIM capacitors. We investigated the impact of precursor choice and HfO<sub>2</sub> addition on material, electrical and reliability characteristics of MIM capacitors. We demonstrated MIM capacitors with high capacitance density, low leakage and excellent reliability which are also suitable for BEOL integration.
FRONTIERS OF CHARACTERIZATION AND METROLOGY FOR NANOELECTRONICS: 2009 | 2009
Heiko Stegmann; Yvonne Ritz; Dirk Utess; René Hübner; Ehrenfried Zschech
Sample preparation is a critical step in transmission electron microscopy (TEM) that significantly determines the quality of structural characterization and analysis of a specimen. In recent years, the accuracy and quality requirements for the preparation of TEM cross‐sections of nanoelectronic structures have drastically increased. Combining a focused low‐energy noble gas ion beam column with a FIB and a SEM column in a three beam system meets these requirements. It provides precise target preparation as well as minimum thickness and surface damage of the TEM sample.
ECS Journal of Solid State Science and Technology | 2013
Dina H. Triyoso; Klaus Hempel; S. Ohsiek; V. Jaschke; J. Shu; Sergej Mutas; Kornelia Dittmar; J. Schaeffer; Dirk Utess; Markus Lenski
Archive | 2011
Dmytro Chumakov; Dirk Utess
Archive | 2013
Frank Koschinsky; Bernd Hintze; Dirk Utess
ICICDT | 2014
Dina H. Triyoso; Wenke Weinreich; Konrad Seidel; Mark Gerard Nolan; Patrick Polakowski; Dirk Utess; S. Ohsiek; K. Dittmar; M. Weisheit; M. Licbau; Robert Fox
Bulletin of the American Physical Society | 2013
Alexander A. Demkov; Hosung Seo; Thong Q. Ngo; Agham Posadas; Son Hoang; Martin MacDaniel; Dirk Utess; Dina Tryiyso; Buddie Mullins; John G. Ekerdt
Archive | 2012
Dmytro Chumakov; Dirk Utess