Dominique Blouin

Energy and Power Consumption Estimation for Embedded Applications and Operating Systems

This paper presents a methodology that permits to estimate the power and energy consumption of embedded applications. Estimation is performed from high-level specifications of the complete system. Power models are built from physical measurements on the hardware platform. Operating system’s services are modeled: scheduler/timer interrupt, inter-process communications, devices accesses models are presented. The operating system’s energy overhead is expressed as the sum of multiple contributions related to services activated during a run. Our methodology is applied to the modeling of a Xillinx Virtex-II Pro XUP platform, and a Linux 2.6 operating system. The comparison of consumption estimations and measurements for different versions of a multi-threaded MJPEG application shows an error ranging from 1% to 11%. Our methodology and power models have been integrated in a CAD tool, named CAT (Consumption Analysis Toolbox), deployed in the Eclipse IDE and also included in the Open Source AADL Tool Environment, bringing energy estimation capabilities in the AADL design flow.

An Efficient Framework for Power-Aware Design of Heterogeneous MPSoC

Currently, designing low-power complex embedded systems is a main challenge for corporations in a large number of electronic domains. There are multiple motivations which lead designers to consider low-power design such as increasing lifetime, improving battery longevity, limited battery capacity, and temperature constraints. Unfortunately, there is a lack of efficient methodology and accurate tool to obtain power/energy estimation of a complete system at different abstraction levels. This paper presents a global framework for power/energy estimation and optimization of heterogeneous multiprocessor system-on-chip (MPSoC). Within this framework, a power modeling methodology is defined, and an open platform is developed. Our methodology takes into account all the embedded system relevant aspects; the software, the hardware, and the operating system. The platform stands for Open Power and Energy Optimization PLatform and Estimator (Open-PEOPLE). It includes diverse estimation tools with respect to their abstraction levels in order to cover the overall design flow. Starting from functional estimation and down to real boards measurements, our platform helps designers to develop new power models, to explore new architectures, and to apply optimization techniques in order to reduce energy and power consumption of the system. The usefulness and the effectiveness of the proposed power estimation framework is demonstrated through a typical embedded system conceived around the Xilinx Virtex II Pro FPGA platform.

Defining an annex language to the architecture analysis and design language for requirements engineering activities support

Several requirements modeling languages such as the requirements package of SysML have been developed to improve the elicitation, analysis, validation and verification of requirements during project development life cycles. However, none of these languages is generic enough to embed explicit traces to components of arbitrary system architecture languages intending to provide a solution to the problem formalized by requirements specifications. For example, systems engineers using the Architecture Analysis and Design Language (AADL) cannot broidge SysML requirements to their architecture models in the same way it is done for UML models. The only way would be to define an external trace model linking the requirements to AADL model elements. In this paper, the new Requirements Definition and Analysis Language (RDAL) is presented. Inspired from SysML and the IEEE 15288 system life cycle processes standards, RDAL requirements can be traced to elements from any language of the solution domain, according to a settings model defining the allowed element types. Moreover, RDAL requirements can be expressed formally in terms of any constraint language such as OCL or REAL (for AADL) to provide automated verification against the associated solution (architecture) models. RDAL also adds important requirements engineering concepts such as environmental assumptions and goals not covered in SysML. RDAL is currently being standardized by the SAE AS-2C committee to become an annex of AADL.

Model Driven High-Level Power Estimation of Embedded Operating Systems Communication Services

This paper presents a System level Model Driven Architecture (MDA) approach for power estimation of real time operating system (RTOS) communication and synchronization services at early design phases.The approach integrates the Architecture Analysis and Design Language (AADL) in the design flow. We describe how to extend the language for modeling RTOS communication and synchronization services, and we explain how power consumption analysis can be performed on software components in the AADL platform independent model (PIM), once deployed into components in the AADL target hardware platform model. Operating system services are considered as components in the MDA approach in order to take them into account in the estimation methodology. This paper focuses on consumption analysis of RTOS communication and synchronization services.

Synchronization of Models of Rich Languages with Triple Graph Grammars: an Experience Report *

We report our experience of using Triple Graph Grammars (TGG) to synchronize models of the rich and complex Architecture Analysis and Design Language (AADL), an aerospace standard of the Society of Automotive Engineers. A synchronization layer has been developed between the OSATE (Open Source AADL Tool Environment) textual editor and the Adele graphical editor in order to improve their integration. Adele has been designed to support editing AADL models in a way that does not necessarily follow the structure of the language, but is adapted to the way designers think. For this reason, it operates on a different meta-model than OSATE. As a result, changes on the graphical model must be propagated automatically to the textual model to ensure consistency of the models. Since Adele does not cover the complete AADL language, this must be done without re-instantiation of the objects to avoid losing the information not represented in the graphical part. The TGG language implemented in the MoTE tool has been used to synchronize the tools. Our results provide a validation of the TGG approach for synchronizing models of large meta-models, but also show that model synchronization remains a challenging task, since several improvements of the TGG language and its tool were required to succeed.

CAT: An extensible system-level power Consumption Analysis Toolbox for Model-Driven design

The Model-Driven Engineering development methodology (MDE) is gaining more and more importance in the process of developing complex embedded systems. This is mainly due to the fact that system complexity is constantly growing, thus increasing the need for higher abstraction levels in the design flow. Nowadays, given the importance of environmental concerns, power consumption has become a major consideration. As a result, a Computer Aided Design (CAD) tool based on MDE and taking into account the global system power consumption requirements at the early phases of the design process would greatly help. In this context, we present our new Consumption Analysis Toolbox (CAT). Developed for the ITEA-SPICES project, CAT is meant to be used as an extensible toolbox integrating a set of component-based power estimation tools and models with power consumption composition laws to allow for the analysis of complex systems.

An Automated Approach for Architectural Model Transformations

Software architectures are frequently represented as large models where many competing quality attributes have to be taken into account. In this context, there may be a large number of possible alternative architectural transformations that the architecture designer has to deal with. The complexity and dimensions of the solution space make that finding the most appropriate architecture considering several quality attributes is a challenging and time-consuming task. In this paper, we present a model transformation framework designed to automate the selection and composition of competing architectural model transformations. We also introduce a case study showing that this framework is useful for rapid prototyping through model transformations.

AADL Extension to Model Classical FPGA and FPGA Embedded within a SoC

With the evolution of technology, the system complexity increased and the application fields of the embedded system expanded. Current applications need a high degree of performance, flexibility, and efficient development environments. Today, reconfigurable logic allows to meet the on-chip processing requirements with new benefits resulting from partial and dynamic reconfiguration. But the dimension introduced in the design of these systems requires more abstraction to manage their complexity and efficient models to provide reliable preliminary estimations. While classical multiprocessor systems can be modeled without difficulty, the use of partial run-time reconfiguration in heterogeneous flexible system-on-chips is generally not covered. The contribution of this paper is to address this with an extension of the AADL language able to model the reconfigurable logic, possibly considering dynamic reconfiguration and power consumption requirements. The proposed AADL model is divided into three levels to provide a generic and hierarchical approach separating the static and dynamic parts of current FPGAs. These levels are exposed in detail and illustrated on a concrete example of FPGA device. The design space exploration of an application deployment using this model is also presented.

Power and Energy Estimations in Model-Based Design

The aim of our works is to provide for methods and tools to quickly estimate the power consumption at the first steps of a system design. We introduce multi-level power models and show how to use them at different levels of the specification refinement in the model-based AADL (Architecture & Analysis Design Language) design flow. Those power models, with the underlying methodology for power estimation, are currently being integrated in the Open Source AADL Tool Environment (OSATE) under the name CAT: Consumption Analysis Toolbox. Its first prototype gives, in the case of a processor binding, power consumption estimations, for software components in the AADL component assembly model, with a maximal error ranging roughly from 5% at the lowest refinement level (the source code of the software component is known), to 30% at the highest level (only the operating frequency and basic target configuration parameters are considered). We illustrate our approach with the power model of a simple RISC (PowerPC 405), of a complex DSP (TI C62), and of a FPGA (from ALTERA). We show how those models can be used at different levels in the AADL flow. Obviously, the power consumption of Operating System (OS) services is also to be considered here. We show that the OS principal impact on the overall consumption is mainly due to services implying data transfers. We introduce a methodology to model Inter-Process Communications (IPC) power and energy consumption, and illustrate this methodology on the building and use of a model for Ethernet based inter-process communications.

Model-Driven Requirements Engineering for Embedded Systems Development

The development of embedded systems is a complex and challenging task. Part of this complexity originates from limited resources and the need to solve tradeoffs between competing quality properties and goals. Producing a correct design therefore requires a complete and understandable requirements specification. Non-Functional Goals (NFGs) are commonly used to analyze these tradeoffs, while Model-Driven Development has the potential to reduce the design complexity of embedded systems by increasing the abstraction level. In this paper, we extend the Requirements Definition and Analysis Language (RDAL) for goals specification in order to drive a model-driven architecture refinement of embedded systems. Determining the impact of the refinements on Non-Functional Properties (NFPs) and relating these NFPs to design objects are the key aspects of our method. The feasibility of the approach is illustrated through the introduction of a Pacemaker system which needs to deal with several NFPs such as performance, availability, and power consumption.