Don Douglas Josephson

Debug methodology for the McKinley processor

The McKinley processor is the result of a joint design effort between Intel and Hewlett-Packard engineers, and is the second processor implementation of the Itanium/sup TM/ Processor Family. This paper describes in detail the processes and methodology developed for debugging a complex and challenging microprocessor design. An overview of microprocessor debug techniques utilized by HP and Intel is presented, followed by descriptions of debug techniques employed on McKinley. Two case studies of electrical bugs encountered during design debug are presented to demonstrate some of the processes and techniques described previously, and results are discussed.

Microprocessor I/sub DDQ/ testing: a case study

The author describe their incorporation of I/sub DDQ/ testing into the design of the PA-7100LC PA-RISC microprocessor. They also discuss design guidelines, measurement techniques, results after fabrication and volume production, and suggested improvement. Their 900,000-transistor custom design supports I/sub DDQ/ testing to ensure high quality without compromising 100-MHz-plus performance. >

Test features of the HP PA7100LC processor

The implementation of an 1149.1 compliant test controller for a low cost, high performance CMOS RISC processor is described. The controller includes features to support I/sub DDQ/ test, internal test, a hardware assisted instruction buffer test, and at speed internal state capture.<<ETX>>