Doohyeok Lim

Steep Subthreshold Swing n- and p-Channel Operation of Bendable Feedback Field-Effect Transistors with p+–i–n+ Nanowires by Dual-Top-Gate Voltage Modulation

In this study, we present the steep switching characteristics of bendable feedback field-effect transistors (FBFETs) consisting of p(+)-i-n(+) Si nanowires (NWs) and dual-top-gate structures. As a result of a positive feedback loop in the intrinsic channel region, our FBFET features the outstanding switching characteristics of an on/off current ratio of approximately 10(6), and point subthreshold swings (SSs) of 18-19 mV/dec in the n-channel operation mode and of 10-23 mV/dec in the p-channel operation mode. Not only can these devices operate in n- or p-channel modes, their switching characteristics can also be modulated by adjusting the gate biases. Moreover, the device maintains its steep SS characteristics, even when the substrate is bent. This study demonstrates the promising potential of bendable NW FBFETs for use as low-power components in integrated circuits or memory devices.

Electrical characteristics of silicon nanowire CMOS inverters under illumination

In this study, we examine the electrical characteristics of complementary metal-oxide-semiconductor (CMOS) inverters with silicon nanowire (SiNW) channels on transparent substrates under illumination. The electrical characteristics vary with the wavelength and power of light due to the variation in the generation rates of the electric-hole pairs. Compared to conventional optoelectronic devices that sense the on/off states by the variation in the current, our device achieves the sensing of the on/off states with more precision by using the voltage variation induced by the wavelength or intensity of light. The device was fabricated on transparent substrates to maximize the light absorption using conventional CMOS technologies. The key difference between our SiNW CMOS inverters and conventional optoelectronic devices is the ability to control the flow of charge carriers more effectively. The improved sensitivity accomplished with the use of SiNW CMOS inverters allows better control of the on/off states.

Feedback and tunneling operations of a p +-i-n + silicon nanowire field-effect transistor

In this paper, we describe the feedback and tunneling operations of a dual top gate field-effect transistor (FET) with a p +-i-n + doped silicon nanowire channel. The transistor functions selectively in either a feedback FET (FBFET) or a tunneling FET mode by modulating the source-to-drain voltage, and it features an outstanding subthreshold swing characteristic of 6.15 mV dec-1 with an on/off current ratio (I on/I off) of approximately 106 in the feedback operating mode and of 41.3 mV dec-1 with I on/I off of ∼107 in the tunneling operating mode. Moreover, our device in the FBFET operation mode has memory characteristics with a retention time of 104 s and a program/erase endurance up to 103 cycles owing to the positive feedback loop in the channel region. This study demonstrates the promising potential of our devices in the development of multifunctional electronics.

Silicon nanowire CMOS NOR logic gates featuring one-volt operation on bendable substrates

In this study, we propose complementary metal-oxide−semiconductor (CMOS) NOR logic gates consisting of silicon nanowire (NW) arrays on bendable substrates. A circuit consisting of two p-channel NW field-effect transistors (NWFETs) in series and two n-channel NWFETs in parallel is constructed to operate a two-input CMOS NOR logic gate. The NOR logic gates operate at a low supply voltage of 1 V with a rail-to-rail logic swing and a high voltage gain of approximately −3.0. The exact NOR logic functionality is achieved owing to the superior electrical characteristics of the well-aligned p- and n-NWFETs, which are obtained using conventional Si-based CMOS technology. Moreover, the NOR logic gates exhibit stable characteristics and have good mechanical properties. The proposed bendable NW CMOS NOR logic gates are promising building blocks for future bendable integrated electronics.

Silicon nanowire ratioed inverters on bendable substrates

In this study, we demonstrate the performance of silicon nanowire (SiNW)n-metal oxide semiconductor (MOS) and p-MOS ratioed inverters that are fabricated on bendable substrates. The electrical characteristics of the fabricateddevices can be controlled by adjusting the load voltage. The logic swings of then- and p-MOS ratioed inverters at a low supply voltage of 1 V are 80% and 96%, respectively. The output voltage level of the p-MOS ratioed inverter is close to rail-to-rail operation. The device also exhibits stable characteristics with goodfatigue properties. Our bendable SiNW ratioed inverters show promise asa candidate building block for future bendable electronics.

Memory characteristics of silicon nanowire transistors generated by weak impact ionization

In this study, we demonstrate the static random access memory (SRAM) characteristics generated by weak impact ionization in bendable field-effect transistors (FETs) with n+-p-n+ silicon nanowire (SiNW) channels. Our bendable SiNW FETs show not only superior switching characteristics such as an on/off current ratio of ~105 and steep subthreshold swing (~5 mV/dec) but also reliable SRAM characteristics. The SRAM characteristics originate from the positive feedback loops in the SiNW FETs generated by weak impact ionization. This paper describes in detail the operating mechanism of our device and demonstrates the potential of bendable SiNW FETs for future SRAM applications.

Nanowatt power operation of silicon nanowire NAND logic gates on bendable substrates

In this paper, we propose a novel construction of silicon nanowire (SiNW) negative-AND (NAND) logic gates on bendable plastic substrates and describe their electrical characteristics. The NAND logic gates with SiNW channels are capable of operating with a supply voltage as low as 0.8 V, with switching and standby power consumption of approximately 1.1 and 0.068 nW, respectively. Superior electrical characteristics of each SiNW transistor, including steep subthreshold slopes, high Ion/off ratio, and symmetrical threshold voltages, are the major factors that enable nanowatt-range power operation of the logic gates. Moreover, the mechanical bendability of the logic gates indicates that they have good and stable fatigue properties.